Abstract: A voltage limiting test system used to test limit voltage values of a memory includes a voltage limiting test device and an assistant test device connected to the voltage limiting test device. The voltage limiting test device includes a button to adjust a voltage of the memory. The assistant test device includes a first timer, and first and second relays. The first relay is used to receive a state signal of the motherboard, to determine whether the first timer is powered according to the state signal. The second relay is used to receive the pulse signal output by the first timer when the first timer is powered, to trigger the button to adjust the voltage of the memory per a reference time. When the motherboard stops working, the voltage value of the memory is a limit voltage value of the memory.

Abstract: A clamping apparatus includes a seat, a first guiding sleeve, a second guiding sleeve, a handle element and a clamping element. The seat includes a support portion and legs integrally formed together. The first guiding sleeve and the second guiding sleeve are mounted at opposite sides of the support portion. The handle element is slidably engaged in the first guiding sleeve and the second guiding sleeve. The clamping element is pivotally connected to one end of the handle element and is received in the second guiding sleeve in a closed position. When the handle element is slid along the seat, the first guiding sleeve and the second guiding sleeve, the clamping element moves out of the second guiding sleeve in an open position; when the handle element is released, the clamping element and the handle element automatically return to the closed position.

Abstract: A signal testing device includes an oscillograph having a plurality of first connection ports, and a signal transmitting cable. The signal transmitting cable includes a plurality of second connection ports, a plurality of coaxial cables and a SAS connector configured for connecting to a mother board. One end of each coaxial cable is electrically connected to a corresponding one of the second connection ports, and the other end is electrically connected to the SAS connector. The first connection ports are configured for engaging with the second connection ports.

Abstract: A test device includes a load module, an input module, an output module, a switching module, and a control module. The load module includes a light electrical load and a heavy electrical load. The input module includes at least one input connector switchably connected to the light load and the heavy load. The output module includes at least one output connector switchably connected to one of the at least one input connector. The switching module is configured to switch a connection between the input connector and the load module, and the connection between the at least one output connector and the at least one input connector. The control module is configured to control the switching module to switch the connections.

Abstract: In a low voltage differential-mode signaling (LVDS) test system and method, a positive signal waveform and a negative signal waveform of an LVDS signal pair are obtained. A differential-mode high voltage, a differential-mode low voltage, and a common-mode noise are measured according to the positive signal waveform and the negative signal waveform. The measurement results are output to an output device.

Abstract: In a method for testing integrity of signals transmitted from hard disk interfaces using a computing device, the computing device connects to an oscilloscope and a mechanical arm that is equipped with a test fixture. The mechanical arm controls the test fixture to make contact with one of the hard disk interfaces to be tested. The method adjusts an intensity grade of the signals through the hard disk interface, and controls the hard disk interface to produce a signal corresponding to the adjusted intensity grade. The test fixture obtains the signal from the hard disk interface, and the oscilloscope measures one or more test parameters of the signal. The method analyzes values of the test parameters to find an optimal signal, determines an intensity grade of the optimal signal as a driving parameter of the hard disk interface, and generates a test report of the hard disk interfaces.

Abstract: In a method for testing serial attached SCSI (SAS) ports of a server using a computing device, the computing device connects to an oscilloscope and a mechanical arm that is equipped with a test fixture having a probe. The mechanical arm controls the probe to be plugged into one of the SAS ports. The method adjusts an intensity grade of the SAS signals through the SAS port, and controls the SAS port to generate a SAS signal corresponding to the intensity grade. The test fixture obtains the SAS signal from the SAS port, and the oscilloscope measures test parameters of the SAS signal. The method analyzes values of the test parameters to find an optimal SAS signal, determines an intensity grade of the optimal SAS signal as a driving parameter of the SAS port, and accordingly generates a test report of the SAS ports.

Abstract: An electronic device includes a serial signal test system to test serial signals generated by a serial signal generator. A test method tests serial signals using the electronic device. The test method sets test parameters that tests serial signals. Furthermore, the test method identifies an error bit from coded bits of each of the serial signals, and identifies abnormal attribute data of each of the serial signals. In addition, the test method generates a test report according to all identified error bits and abnormal attribute data.

Abstract: In a method for analyzing integrality of serial attached SCSI (SAS) signals using a computing device, the computing device connects to a signal measuring device and an electronic device. A group of test parameters, an intensity grade of a SAS signal, and a total number are set for evaluating integrality of the SAS signal. The intensity grade of the SAS signal is adjusted through an SAS interface of the electronic device. The signal measuring device measures test parameters of the SAS signal, and a test number is recorded when the test parameters of the SAS are measured. The method analyzes the integrality of the SAS signal to find an optimal SAS signal when the test number equals the total number, and determines an intensity grade of the optimal SAS signal as a driving parameter of the SAS interface.

Abstract: An oscillograph can identify signals of a serial data bus. The signal identifying method triggers communication channels of the oscillograph, measures a rise time and a fall time for each captured signal, and sets a sender terminal (ST) and a receiver terminal (RT) for each of the captured signals according to the measured results. The signal identifying method determines the ST and RT for each of the captured signals after the oscillograph is triggered. If the determined ST of each of the acquired signals is identical to the set ST and the determined RT of the each of the acquired signals is identical with the set RT, the signal identifying process is completed and a report is generated to record the signal identifying result.

Abstract: In a low voltage differential signal (LVDS) timing test system and method, a clock signal waveform and a data signal waveform are obtained. Clock cycles are selected from the clock signal waveform. Data bits transmitted within the selected clock cycles are identified from the data signal waveform. Accordingly, bit positions of the data bits are determined.

Abstract: A test system includes a main selector, a first and a second switching connectors, a first and a second sub-selectors, and a processor. The main selector includes a number of first switches, a number of first contacts, and a number of second contacts. Each sub-selector includes a second switch, a third contact, and a fourth contact. The processor sends a first instruction and a second instruction to correspondingly control the main selector and a selected sub-selector.

Abstract: An electronic device includes a video signal detection system to measure video signals. A measurement method can measure the video signals by using the electronic device. The measurement method sets measurement parameters that are used to measure video signals. Furthermore, the measurement method generates measurement results that each corresponds to a video signal transmission channel between the electronic device and a video signal processing device. In addition, the measurement method generates a measurement report according to all the measurement results.

Abstract: A voltage limiting test system used to test limit voltage values of a memory includes a voltage limiting test device and an assistant test device connected to the voltage limiting test device. The voltage limiting test device includes a button to adjust a voltage of the memory. The assistant test device includes a first timer, and first and second relays. The first relay is used to receive a state signal of the motherboard, to determine whether the first timer is powered according to the state signal. The second relay is used to receive the pulse signal output by the first timer when the first timer is powered, to trigger the button to adjust the voltage of the memory per a reference time. When the motherboard stops working, the voltage value of the memory is a limit voltage value of the memory.

Abstract: A signal testing device includes an oscillograph having a plurality of first connection ports, and a signal transmitting cable. The signal transmitting cable includes a plurality of second connection ports, a plurality of coaxial cables and a SAS connector configured for connecting to a mother board. One end of each coaxial cable is electrically connected to a corresponding one of the second connection ports, and the other end is electrically connected to the SAS connector. The first connection ports are configured for engaging with the second connection ports.

Abstract: A test system includes a serial advanced technology attachment (SATA) test apparatus, a number of test cables, and an oscillograph. Each test cable includes a soft sub-miniature-a wire and a sub-miniature-a connector. A first terminal of each sub-miniature-a wire is electrically fixed to an output of the SATA test apparatus. A second terminal of each sub-miniature-a wire is connected to the corresponding sub-miniature-a connector. Each sub-miniature-a connector is used to connect to an input of the oscillograph.

Abstract: An electronic device with anti-theft protection includes an alarm unit, a mercury connector, and a microprocessor connected therebetween. The mercury connector includes a body containing mercury, and first and second leads arranged on the body. The microprocessor includes a first signal terminal and a second signal terminal. The first signal terminal is connected to the first lead. The second signal terminal is connected to the second lead. When the microprocessor has entered the anti-theft mode, if the electronic device is moved, the first lead connects to the second lead via the mercury and forms a circuit path from the first signal terminal to the second signal terminal. The microprocessor starts the alarm unit to generate an alarm.

Abstract: In a low voltage differential-mode signaling (LVDS) test system and method, a positive signal waveform and a negative signal waveform of an LVDS signal pair are obtained. A differential-mode high voltage, a differential-mode low voltage, and a common-mode noise are measured according to the positive signal waveform and the negative signal waveform. The measurement results are output to an output device.

Abstract: A system and method for testing video graphics array (VGA) signal groups includes configuring a route parameter of each of the VGA signal groups, establishing a connection between an input channel and an output channel of a signal channel selector corresponding to each of the VGA signal groups, and transferring each of the VGA signal groups to the digital oscilloscope through the connection. The system and method further includes enabling the digital oscilloscope to analyze each of the VGA signal groups and acquire analysis results of each of the VGA signal groups.

Abstract: A test system includes a main selector, a first and a second switching connectors, a first and a second sub-selectors, and a processor. The main selector includes a number of first switches, a number of first contacts, and a number of second contacts. Each sub-selector includes a second switch, a third contact, and a fourth contact. The processor sends a first instruction and a second instruction to correspondingly control the main selector and a selected sub-selector.