Abstract: A core wire set comprising a first core wire, a second core wire arranged in parallel to the first core wire, a first covering layer covering the first core wire and the second core wire, a second covering layer, and a bare metal wire is provided. Wherein the second covering layer covers the first covering layer and a wire placement space is formed between the first covering layer and the second covering layer. Wherein the bare metal wire is arranged in the wire placement space.

Abstract: The present disclosure provides a signal transmission device for setting on a wall. The signal transmission device comprises a circuit board, an electrical signal connector, an optical signal connector, a photoelectric converter, and a power injector. The electrical signal connector is arranged on the circuit board and configured to transmit and receive an electrical signal. The optical signal connector is arranged on the circuit board and configured to transmit and receive an optical signal. The photoelectric converter is placed on the circuit board and coupled between the electrical and optical signal connectors. Selectively. The photoelectric converter selectively converts the electrical signal to the optical signal or the optical signal to the electrical signal. The power injector is arranged on the circuit board and configured to provide working power to the photoelectric converter.

Abstract: A connector module for connecting a cable. The connector module comprises a connector, a circuit adapter board, a shell and a first insulation sheet. The connector has at least one terminal pin and a housing. The circuit adapter board is configured to electrically connect with the at least one terminal pin and at least one wire of the cable. The shell is configured to cover the circuit adapter board and at least a portion of the housing. The first insulation sheet is arranged over a first surface of the circuit adapter board, and located in the shell. Wherein the first insulation sheet has an inner concave structure to form a space between the first insulation sheet and the first surface.

Abstract: A cable connector includes a connector body, a cable, a circuit board, and a bump block. The connector body is provided with a plurality of plug terminals welded on a plurality of terminal pads on the circuit board. A plurality of upper and lower core wires of the cable are welded on a plurality of core wire pads on the top and bottom surfaces of the circuit board. The wire divider includes a plurality of grooves and at least one perforation. Each core wire is embedded in the corresponding groove. The bump block is inserted into the perforation. Part of the bump block passes through the perforation and is located between the cable's upper and lower core wires. Through the shielding effect of the bump block, it can avoid to form the electrical coupling between the upper and lower core wires so as to reduce crosstalk.

Abstract: A wire module is disclosed, which includes a wire group and a wire-distributing device. The wire group has a plurality of wires. The wire-distributing device includes a first wire-distributing module and a second wire-distributing module. The first wire-distributing module has a first wire-distributing member and a first sectional surface. The first sectional surface is located on the surface of one end of the first wire-distributing member, and the first part of the plurality of wires is positioned side by side on the first wire-distributing member. The second wire-distributing module has similar structures and configurations to the first wire-distributing module, wherein the first wire-distributing module is stacked on the second wire-distributing module, and the first sectional surface and the second sectional surface are correspondingly located on the same side.

Abstract: A transmission cable includes a terminal connector and a line set. The terminal connector includes a circuit board and a setting head having a power terminal, a grounding terminal, and a first signal terminal. The line set includes a signal transmission unit having a first signal transmission part and a drain wire. The first signal transmission part is electrically coupled to the first signal terminal via the circuit board, and the drain wire is electrically connected to the power terminal via the circuit board.

Abstract: Provided are point of care sensor systems that include portable readers and disposable cartridges for receiving and analyzing samples. A cartridge may be equipped with one or more sensor channels, each containing one or more sensors. After providing a sample to a cartridge, the cartridge can be inserted into a reader, which can interact with the cartridge to perform on-cartridge sensing and receive signals indicating the presence and/or quantity of one or more targets in the sample. Examples of cartridges can include cardiac panels, sepsis panels and the like. In some embodiments, the same sensor hardware may be configured for multiple measurements of different targets conducted at different time frames. Also provided herein are novel on-cartridge solid and liquid reagent storage and delivery mechanisms.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to forma second spacer.

Abstract: Provided are point of care sensor systems that include portable readers and disposable cartridges for receiving and analyzing samples. A cartridge may be equipped with one or more sensor channels, each containing one or more sensors. After providing a sample to a cartridge, the cartridge can be inserted into a reader, which can interact with the cartridge to perform on-cartridge sensing and receive signals indicating the presence and/or quantity of one or more targets in the sample. Examples of cartridges can include cardiac panels, sepsis panels and the like. In some embodiments, the same sensor hardware may be configured for multiple measurements of different targets conducted at different time frames. Also provided herein are novel on-cartridge solid and liquid reagent storage and delivery mechanisms.

Abstract: Provided are point of care sensor systems that include portable readers and disposable cartridges for receiving and analyzing samples. A cartridge may be equipped with one or more sensor channels, each containing one or more sensors. After providing a sample to a cartridge, the cartridge can be inserted into a reader, which can interact with the cartridge to perform on-cartridge sensing and receive signals indicating the presence and/or quantity of one or more targets in the sample. Examples of cartridges can include cardiac panels, sepsis panels and the like. In some embodiments, the same sensor hardware may be configured for multiple measurements of different targets conducted at different time frames. Also provided herein are novel on-cartridge solid and liquid reagent storage and delivery mechanisms.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to forma second spacer.

Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to form a second spacer.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to form a second spacer.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.

Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.

Abstract: A semiconductor device includes a substrate, a metal gate on the substrate, and a first inter-layer dielectric (ILD) layer around the metal gate. A top surface of the metal gate is lower than a top surface of the ILD layer thereby forming a recessed region atop the metal gate. A mask layer is disposed in the recessed region. A void is formed in the mask layer within the recessed region. A second ILD layer is disposed on the mask layer and the first ILD layer. A contact hole extends into the second ILD layer and the mask layer. The contact hole exposes the top surface of the metal gate and communicates with the void. A conductive layer is disposed in the contact hole and the void.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.