Patents by Inventor Jui-Tai Ko

Jui-Tai Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7489740
    Abstract: A receiver with baseline wander compensation is applicable to a digital communication system. The receiver includes an Analog-to-Digital Converter (ADC), a slicer, a threshold value detector, a gain controller, a baseline wander compensator, a delay circuit, an analog gain stage, and a digital gain stage. The baseline wander compensator is used to perform an operation and a filtering process on a voltage obtained prior to processing by the slicer and a voltage after the processing so as to obtain a baseline wander voltage value for compensation and control. The threshold value detector and the gain controller dynamically produce control signals of analog gain and digital gain. The analog gain stage compensates degrading of communication signals passing through transmission channels in an analog gain manner. The delay circuit is used to compensate the delay of the conversion performed by the ADC. The digital gain stage compensates insufficiency of the analog gain.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: February 10, 2009
    Assignee: RDC Semiconductor Co., Ltd.
    Inventors: Ming-Chou Yen, Kun-Ying Tsai, Jui-Tai Ko, Chun-Wang Wei
  • Patent number: 7453928
    Abstract: A data transmission device is applied to a network apparatus having an automatic crossover function, and is connected to a transmission control unit, such that the transmission control unit detects an operating status of the network apparatus and accordingly generates a control command. Thereby, a current source generating unit provides current sources to a first-mode converting unit and a second-mode converting unit according to the control command. This allows a suitable data transmission processing mode to be selected automatically and instantaneously for the operating status of the network apparatus by the current sources from the current source generating unit and the control command generated from the transmission control unit, so as to achieve power saving, low distortion and/or anti-interference.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: November 18, 2008
    Assignee: RDC Semiconductor Co., Ltd.
    Inventors: Ming-Chou Ten, Chun-Wang Wei, Kun-Ying Tsai, Jui-Tai Ko
  • Patent number: 7447262
    Abstract: This invention presents a novel receiver architecture for full-duplex multi-level PAM systems. The receiver employs an Analog-to-Digital Converter (ADC) that has a sample rate flexibly specified as (Ns+1)/Ns baud rate where Ns is an integer equal or greater than 1. A fractional-spaced echo canceller is used to cancel the echo at the ADC output. The use of a fractional sampling rate higher than the baud rate also enables the timing recovery function be implemented in the digital domain and hence eliminates the need of using the complex analog phase selection circuit. The receiver is also capable of fast, blind start-up by use of a decision feedback equalizer with unity main tap and a soft level slicer. The timing phase can be optimally located using a derivative channel estimator.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: November 4, 2008
    Assignee: RDC Semiconductor Co., Ltd.
    Inventors: Ching-Yih Tseng, Ming-Chou Yen, Jui-Tai Ko, Kun-Ying Tsai
  • Publication number: 20080013648
    Abstract: Decoding systems and methods for deciding a compensated signal are provided. The decoding system comprises a slicer, a compensator, and a selector. The slicer is used for generating a pre-decision symbol. The compensator is used for determining a predetermined range of the compensated signal. The selector is used for deciding the compensated signal in response to the pre-decision symbol, the predetermined range and a set of previous symbols. The predetermined range is to limit the calculation range of the compensated signal so that the required hardware is reduced.
    Type: Application
    Filed: July 17, 2006
    Publication date: January 17, 2008
    Applicant: RDC SEMICONDUCTOR CO., LTD.
    Inventors: Ming-Chou Yen, Kun-Ying Tsai, Ling-I Ho, Chun-Wang Wei, Jui-Tai Ko
  • Publication number: 20060256849
    Abstract: This invention presents a novel receiver architecture for full-duplex multi-level PAM systems. The receiver employs an Analog-to-Digital Converter (ADC) that has a sample rate flexibly specified as (Ns+1)/Ns baud rate where Ns is an integer equal or greater than 1. A fractional-spaced echo canceller is used to cancel the echo at the ADC output. The use of a fractional sampling rate higher than the baud rate also enables the timing recovery function be implemented in the digital domain and hence eliminates the need of using the complex analog phase selection circuit. The receiver is also capable of fast, blind start-up by use of a decision feedback equalizer with unity main tap and a soft level slicer. The timing phase can be optimally located using a derivative channel estimator.
    Type: Application
    Filed: May 12, 2005
    Publication date: November 16, 2006
    Applicant: RDC Semiconductor Co., Ltd.
    Inventors: Ching-Yih Tseng, Ming-Chou Yen, Jui-Tai Ko, Kun-Ying Tsai
  • Patent number: 7106235
    Abstract: An active hybrid circuit for a full duplex channel generates a duplicated voltage at the current output stage to reduce the energy of the transmitter transmitted to the receiver. The active hybrid circuit cancels the energy of the transmitter transmitted to the receiver when it is operated in a full duplex channel with high-speed transmission. The active hybrid circuit for full a duplex channel comprises a transmit digital-to-analog converter for generating an analog transmit signal, a receive analog-to-digital converter for receiving an analog receive signal, a duplicated voltage digital-to-analog converter for generating a corresponding duplicated voltage according to the analog transmit signal of the transmit digital-to-analog converter, and a plurality of signal combiners for subtracting the duplicated voltage from the analog transmit signal to cancel the influence of analog transmit signal to the analog receive signal.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: September 12, 2006
    Assignee: Semiconductor Co., Ltd.
    Inventors: Ming-Chou Yen, Hsin-Chieh Lin, Kun-Ying Tsai, Jui-Tai Ko, Chun-Wang Wei
  • Publication number: 20060188037
    Abstract: A data transmission device is applied to a network apparatus having an automatic crossover function, and is connected to a transmission control unit, such that the transmission control unit detects an operating status of the network apparatus and accordingly generates a control command. Thereby, a current source generating unit provides current sources to a first-mode converting unit and a second-mode converting unit according to the control command. This allows a suitable data transmission processing mode to be selected automatically and instantaneously for the operating status of the network apparatus by the current sources from the current source generating unit and the control command generated from the transmission control unit, so as to achieve power saving, low distortion and/or anti-interference.
    Type: Application
    Filed: November 8, 2005
    Publication date: August 24, 2006
    Applicant: RDC Semiconductor Co., Ltd.
    Inventors: Ming-Chou Yen, Chun-Wang Wei, Kun-Ying Tsai, Jui-Tai Ko
  • Publication number: 20060120491
    Abstract: A receiver with baseline wander compensation is applicable to a digital communication system. The receiver includes an Analog-to-Digital Converter (ADC), a slicer, a threshold value detector, a gain controller, a baseline wander compensator, a delay circuit, an analog gain stage, and a digital gain stage. The baseline wander compensator is used to perform an operation and a filtering process on a voltage obtained prior to processing by the slicer and a voltage after the processing so as to obtain a baseline wander voltage value for compensation and control. The threshold value detector and the gain controller dynamically produce control signals of analog gain and digital gain. The analog gain stage compensates degrading of communication signals passing through transmission channels in an analog gain manner. The delay circuit is used to compensate the delay of the conversion performed by the ADC. The digital gain stage compensates insufficiency of the analog gain.
    Type: Application
    Filed: August 16, 2005
    Publication date: June 8, 2006
    Applicant: RDC Semiconductor Co., Ltd.
    Inventors: Ming-Chou Yen, Kun-Ying Tsai, Jui-Tai Ko, Chun-Wang Wei
  • Publication number: 20060076424
    Abstract: A data processing system and method are provided. A first combination logical encoding unit encodes a first set of encryption data to create digital symbols and outputs the digital symbols to an analog/digital symbol processing unit. Further, a combination logical decoding unit performs logical operations to transform a first set of multi-dimensional digital symbols converted from multi-dimensional analog symbols received from a network via the analog/digital symbol processing unit to create a second set of encryption data. Then, the analog/digital symbol processing unit outputs the second encryption data to a second combination logical encoding unit where the second set of encryption data is encoded to create a second set of multi-dimensional digital symbols. A comparing unit then compares the first and second sets of multi-dimensional digital symbols to determine the validity of the first set.
    Type: Application
    Filed: March 8, 2005
    Publication date: April 13, 2006
    Applicant: RDC Semiconductor Co., Ltd.
    Inventors: Ming-Chou Yen, Kun-Ying Tsai, Jui-Tai Ko, Chun-Wang Wei
  • Publication number: 20050249275
    Abstract: Timing recovery method and device for combining pre-filtering and feed-forward equalizer functions are proposed and used in a digital communication system. A signal receiver is provided to receive a signal transmitted from a signal transmitter in the communication system, and recovers a sampling clock phase of the received signal to the phase of the signal transmitted from the signal transmitter. The method is used to control the signal receiver to transform the received signal to a signal similar to a Nyquist pulse after the pre-filtering and feed-forward equalizing operations are performed on the received signal, thereby improving the performance of the following sampling timing recovery process and increasing the signal noise ratio (SNR) of the received signal.
    Type: Application
    Filed: October 12, 2004
    Publication date: November 10, 2005
    Inventors: Ming-Chou Yen, Chun-Wang Wei, Kun-Ying Tsai, Jui-Tai Ko