Abstract: A device comprising a die substrate; a plurality of interconnects located over the die substrate, wherein the plurality of interconnects comprise a first plurality of interconnects comprising a first plurality of via interconnects, wherein the first plurality of interconnects are configured as a first inductor; and a second plurality of interconnects comprising a second plurality of via interconnects, wherein the second plurality of interconnects are configured as a second inductor; wherein the first inductor and the second inductor are intertwined, at least one magnetic layer that surrounds at least part of the first plurality of via interconnects and at least part of the second plurality of via interconnects; and at least one dielectric layer located over the die substrate.

Abstract: A package comprising an integrated device and a substrate coupled to the integrated device through a plurality of solder interconnects. The substrate comprises at least one magnetic layer, at least one dielectric layer; and a plurality of interconnects. The plurality of interconnects comprise a first set of interconnects that are configured to operate as a first inductor and a second set of interconnects that are configured to operate as a second inductor. The second inductor and the first inductor are configured to operate as inductively coupled inductors.

Abstract: In an aspect, an apparatus is disclosed that includes a surface-mounted integrated circuit package housing an active oscillator circuit; an integrated ceramic resonator formed from a ceramic substrate having an upper planar surface receiving the surface-mounted integrated circuit package, the integrated ceramic resonator including a plurality of conductive walls forming a conductive periphery of a ceramic cavity in the ceramic substrate, a conductive rod extending vertically into the ceramic cavity, wherein the conductive rod is isolated from contact with the conductive periphery of the ceramic cavity, a first conductive material extending vertically through the upper planar surface of the ceramic substrate for connecting the conductive periphery of the ceramic cavity to the surface-mounted integrated circuit package housing the active oscillator circuit; and a second conductive material extending through the upper planar surface of the ceramic substrate for connecting the conductive rod to the surface-mounte

Abstract: A device comprising (i) a first device portion comprising: a die substrate; at least one first dielectric layer; a first plurality of interconnects; a first encapsulation layer; and a first plurality of via interconnects located at least in the first encapsulation layer; (ii) a second device portion comprising: at least one second dielectric layer; a second plurality of interconnects; a second encapsulation layer; and a second plurality of via interconnects located at least in the second encapsulation layer; and (iii) a first plurality of solder interconnects coupled to the first device portion and the second device portion, wherein the first plurality of interconnects, the first plurality of via interconnects, the first plurality of solder interconnects, the second plurality of interconnects and the second plurality of via interconnects are configured to operate as an inductor.

Abstract: An inductive device includes a first set of conductive lines, a second set of conductive lines, and conductive pillars connecting the first set of conductive lines to the second set of conductive lines to form an integrated inductor. The inductive device also includes one or more magnetic layers extending along a length of the integrated inductor and within an aperture of the integrated inductor.

Abstract: An inductive device includes multiple packaged devices, each including a body and a conductor layer within the body and a set of external connectors. The conductor layer of a packaged device includes a set of conductive lines electrically connected to the set of external connectors of the packaged device. Conductive lines of two packaged devices of the inductive device are at an angle relative to one another. External connectors of the packaged devices are coupled to one another to electrically connect the sets of conductive lines to define one or more coils, each coil having multiple turns and each turn including a conductive line of each packaged device.

Abstract: Disclosed is a three-dimensional (3D) inductor with two-side bonding wires. The 3D inductor enables high inductance to be achieved, e.g., for integrated voltage regulators (IVR) and/or external voltage regulators (EVR). The inductance of the 3D inductor can be enhanced with magnetic molding compounds.

Abstract: In an aspect, an apparatus is disclosed that includes a surface-mounted integrated circuit package housing an active oscillator circuit; an integrated ceramic resonator formed from a ceramic substrate having an upper planar surface receiving the surface-mounted integrated circuit package, the integrated ceramic resonator including a plurality of conductive walls forming a conductive periphery of a ceramic cavity in the ceramic substrate, a conductive rod extending vertically into the ceramic cavity, wherein the conductive rod is isolated from contact with the conductive periphery of the ceramic cavity, a first conductive material extending vertically through the upper planar surface of the ceramic substrate for connecting the conductive periphery of the ceramic cavity to the surface-mounted integrated circuit package housing the active oscillator circuit; and a second conductive material extending through the upper planar surface of the ceramic substrate for connecting the conductive rod to the surface-mounte

Abstract: A device comprising a die substrate, a plurality of interconnects located over the die substrate, at least one magnetic layer, and at least one dielectric layer located over the die substrate. The plurality of interconnects comprise a first plurality of plate interconnects, a second plurality of plate interconnects, and a plurality of via interconnects coupled to the first plurality of plate interconnects and the second plurality of plate interconnects. The first plurality of plate interconnects, the plurality of via interconnects, and the second plurality of plate interconnects are configured to operate as an inductor. The at least one magnetic layer surrounds at least part of the plurality of via interconnects.

Abstract: A compact, hybrid, acoustic wave filter structure is disclosed. In an aspect an apparatus comprises a substrate; a first, multi-layer metallization structure disposed above the substrate; a plurality of pillar structures disposed above, and electrically coupled to, the first metallization structure; a second metallization structure disposed above, an electrically coupled to, the plurality of pillar structures. An acoustic unit (AU) is disposed between the first and second metallization structures and adjacent to at least one of the pillar structures. The AU comprises a surface acoustic wave or bulk acoustic wave acoustic resonator that is electrically coupled to a capacitor and an inductor. The capacitor comprises a metal-insulation-metal capacitor that is formed from a portion of the first metallization structure and optionally also from at least one pillar structure and a portion of the second metallization structure. The inductor is comprised of a second portion of the first metallization structure.

Abstract: Disclosed is a device including an inductor that includes a substrate; a plurality of vias disposed through the substrate and filled with a conductive metal; a via structure disposed through the substrate and extending between the plurality of vias, wherein the via structure is filled with a magnetic material to form a magnetic core of the inductor; and one or more patterned metallization layers interconnecting the conductive metal of the plurality of vias; wherein the one or more patterned metallization layers and the conductive metal filling the plurality of vias form a winding of the inductor about the magnetic core.

Abstract: A device is described. The device includes a substrate having a first cavity. The device also includes a first redistribution layer (RDL) on sidewalls and a base of the first cavity in the substrate and on a first surface of the substrate. The device further includes a fill material in the first cavity.

Abstract: Inductor packages employing wire-bonds over a lead frame to form integrated inductor(s), and related integrated circuit (IC) packages and fabrication methods. The inductor package includes one or more integrated inductors each formed from leads of a lead frame coupled together in a pattern through wire bonds to foil a coil(s). An overmold material is formed over the lead frame with the coil(s) formed from the wire-bonded leads to form the inductor package. The overmold material can include a magnetic material to further increase the inductance of the integrated inductor(s). The inductor package can be mounted to a package substrate of an IC package to provide an inductor(s) for a circuit in the IC package. By using a lead frame to form an inductor package, fabrication processes used to form lead frames can also be used to form the inductor package as a less complex, lower cost manufacturing method.

Abstract: A method of forming image sensor packages may include performing a molding process. Mold material may be formed either on a transparent substrate in between image sensor dies, or on a removable panel in between transparent substrates attached to image sensor dies. Redistribution layers may be formed before or after the molding process. Mold material may be formed after forming redistribution layers so that the mold material covers the redistribution layers. In these cases, holes may be formed in the mold material to expose solder pads on the redistribution layers. Alternatively, redistribution layers may be formed after the molding process and the redistribution layers may extend over the mold material. Image sensor dies may be attached to a glass or notched glass substrate with dam structures. The methods of forming image sensor packages may result in hermetic image sensor packages that prevent exterior materials from reaching the image sensor.

Abstract: A method for packaging applies to packaging a plurality of wafer-level lenses. Each wafer-level lens includes (a) a substrate with opposite facing first and second surfaces and (b) a respective lens element on at least one of the first and second surfaces. Each lens element has a lens surface facing away from the substrate. The method includes partially encasing the plurality of wafer-level lenses with a housing material to produce a wafer of packaged wafer-level lenses. In the wafer of packaged wafer-level lenses, the housing material supports each of the plurality of wafer-level lenses by contacting the respective substrate, and the housing is shaped to form a plurality of housings for the plurality of wafer-level lenses, respectively.

Abstract: A method of forming image sensor packages may include performing a molding process. Mold material may be formed either on a transparent substrate in between image sensor dies, or on a removable panel in between transparent substrates attached to image sensor dies. Redistribution layers may be formed before or after the molding process. Mold material may be formed after forming redistribution layers so that the mold material covers the redistribution layers. In these cases, holes may be formed in the mold material to expose solder pads on the redistribution layers. Alternatively, redistribution layers may be formed after the molding process and the redistribution layers may extend over the mold material. Image sensor dies may be attached to a glass or notched glass substrate with dam structures. The methods of forming image sensor packages may result in hermetic image sensor packages that prevent exterior materials from reaching the image sensor.

Abstract: A method of forming image sensor packages may include performing a molding process. Mold material may be formed either on a transparent substrate in between image sensor dies, or on a removable panel in between transparent substrates attached to image sensor dies. Redistribution layers may be formed before or after the molding process. Mold material may be formed after forming redistribution layers so that the mold material covers the redistribution layers. In these cases, holes may be formed in the mold material to expose solder pads on the redistribution layers. Alternatively, redistribution layers may be formed after the molding process and the redistribution layers may extend over the mold material. Image sensor dies may be attached to a glass or notched glass substrate with dam structures. The methods of forming image sensor packages may result in hermetic image sensor packages that prevent exterior materials from reaching the image sensor.

Abstract: A method of forming image sensor packages may include performing a molding process. Mold material may be formed either on a transparent substrate in between image sensor dies, or on a removable panel in between transparent substrates attached to image sensor dies. Redistribution layers may be formed before or after the molding process. Mold material may be formed after forming redistribution layers so that the mold material covers the redistribution layers. In these cases, holes may be formed in the mold material to expose solder pads on the redistribution layers. Alternatively, redistribution layers may be formed after the molding process and the redistribution layers may extend over the mold material. Image sensor dies may be attached to a glass or notched glass substrate with dam structures. The methods of forming image sensor packages may result in hermetic image sensor packages that prevent exterior materials from reaching the image sensor.

Abstract: A method for packaging applies to packaging a plurality of wafer-level lenses. Each wafer-level lens includes (a) a substrate with opposite facing first and second surfaces and (b) a respective lens element on at least one of the first and second surfaces. Each lens element has a lens surface facing away from the substrate. The method includes partially encasing the plurality of wafer-level lenses with a housing material to produce a wafer of packaged wafer-level lenses. In the wafer of packaged wafer-level lenses, the housing material supports each of the plurality of wafer-level lenses by contacting the respective substrate, and the housing is shaped to form a plurality of housings for the plurality of wafer-level lenses, respectively.

Abstract: An apparatus includes an image sensor partitioned into N image sensor regions. The image sensor is attached to a circuit board. A lens array having including N lenses is disposed proximate to the image sensor. Each one of the N lenses is arranged to focus a single image onto a respective one of the N image sensor regions. A spacer structure is stacked between to the lens array and the circuit board to separate the lens array from the image sensor, wherein the spacer structure surrounds a perimeter around all of the N image sensor regions and N lenses such that none of the spacer structure is disposed between any of the N lenses and N image sensor regions of the image sensor.