Patents by Inventor Jui-Yu Hung

Jui-Yu Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119283
    Abstract: A method of performing automatic tuning on a deep learning model includes: utilizing an instruction-based learned cost model to estimate a first type of operational performance metrics based on a tuned configuration of layer fusion and tensor tiling; utilizing statistical data gathered during a compilation process of the deep learning model to determine a second type of operational performance metrics based on the tuned configuration of layer fusion and tensor tiling; performing an auto-tuning process to obtain a plurality of optimal configurations based on the first type of operational performance metrics and the second type of operational performance metrics; and configure the deep learning model according to one of the plurality of optimal configurations.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Jui-Yang Hsu, Cheng-Sheng Chan, Jen-Chieh Tsai, Huai-Ting Li, Bo-Yu Kuo, Yen-Hao Chen, Kai-Ling Huang, Ping-Yuan Tseng, Tao Tu, Sheng-Je Hung
  • Publication number: 20240072115
    Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: February 13, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
  • Patent number: 9378780
    Abstract: The present disclosure provides a sense amplifier. The sense amplifier includes a first inverting circuit, a second inverting circuit, a pre-charge circuit, a voltage adjusting circuit, and a discharge circuit. The first inverting circuit has a first input end and a first output end, and the second inverting circuit has a second input end and a second output end. The pre-charge circuit pulls up the voltage levels on the first and second output ends according to a power voltage during a pre-charge time period. The voltage adjusting circuit respectively receives a bit line voltage and a reference voltage during the pre-charge time period, and adjusts voltages on the first and second output ends respectively according to the voltage on the second and first receiving ends. The discharge circuit pulls down voltage levels on the first and second receiving ends of the voltage adjusting circuit during a discharge time period.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: June 28, 2016
    Assignee: National Tsing Hua University
    Inventors: Meng-Fan Chang, Jui-Yu Hung