Patents by Inventor Jui-Yuan Yu

Jui-Yuan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170239091
    Abstract: An eardrum incision device includes a main body, a replaceable inserting portion and a display device. The replaceable inserting portion is detachably connected to the main body. The replaceable inserting portion has an insertion end located on a side far away from the main body and adapted to be inserted into an ear canal of a user. The replaceable inserting portion includes an image-capturing device, a mounting hole and a replaceable incision component. The image-capturing device is disposed at the insertion end. The mounting hole extends in a direction from the insertion end toward the main body. The replaceable incision component is removably disposed in the mounting hole and adapted to pierce out of the mounting hole in a direction toward the insertion end, so as to incise the eardrum of the user. The display device is disposed on the main body and electrically connected to the image-capturing device.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 24, 2017
    Applicant: ALTEK CORPORATION
    Inventors: Douglas Franz, Chin-Cheng Chiu, Jui-Yuan Yu, Hsi-Hsin Loo
  • Patent number: 8833939
    Abstract: A fundus image detection apparatus capable of detecting a fundus image of an eye of an animal is provided. The fundus image detection apparatus includes an image capturing unit and an image processing unit electrically connected with the image capturing unit. The image processing unit has a lookup table. The image processing unit corrects the fundus image of the eye of the animal according to the lookup table to diminish pincushion distortion. Moreover, a method for obtaining a fundus image of an eye of an animal is also provided.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: September 16, 2014
    Assignee: Altek Corporation
    Inventors: Te-Chao Tsao, Jui-Yuan Yu
  • Publication number: 20140192319
    Abstract: A fundus image detection apparatus capable of detecting a fundus image of an eye of an animal is provided. The fundus image detection apparatus includes an image capturing unit and an image processing unit electrically connected with the image capturing unit. The image processing unit has a lookup table. The image processing unit corrects the fundus image of the eye of the animal according to the lookup table to diminish pincushion distortion. Moreover, a method for obtaining a fundus image of an eye of an animal is also provided.
    Type: Application
    Filed: January 8, 2013
    Publication date: July 10, 2014
    Applicant: ALTEK CORPORATION
    Inventors: Te-Chao Tsao, Jui-Yuan Yu
  • Patent number: 7924100
    Abstract: A communication device uses a local clock generator to regenerate the carrier frequency of the reference signal from a remote communication. In particular, a closed loop is used to self-calibrate the local pulse till the frequency is fixed to be within a fixed frequency margin. Once the local pulse is obtained, the demodulator will use the local pulse to demodulate the reference signal to generate the data signal.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: April 12, 2011
    Assignee: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu
  • Patent number: 7825713
    Abstract: An absolute time delay generating device includes a PVT (process-voltage-temperature) detection device and a delay-timing generator. The PVT detection device includes at least a delay module and a signal phase/frequency control module. The delay module includes a control unit and a reference unit. The control unit differs from the reference unit in sensitivity of delay property to PVT. The delay module compares phase or frequency differences generated when origin signals pass through the control unit and reference unit respectively, and produce delay parameters of the delay module. The signal phase/frequency control module receives and compares the delay parameters to determine an ambient PVT condition for the absolute time delay generating device, so as to control and correct the delay-timing generator and thereby generate accurate absolute time delay. Under various PVT influences, the absolute time delay generating device is capable of generating accurate, absolute time signals.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: November 2, 2010
    Assignee: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu, Chien-Ying Yu, Juinn-Ting Chen
  • Publication number: 20100013536
    Abstract: An absolute time delay generating device includes a PVT (process-voltage-temperature) detection device and a delay-timing generator. The PVT detection device includes at least a delay module and a signal phase/frequency control module. The delay module includes a control unit and a reference unit. The control unit differs from the reference unit in sensitivity of delay property to PVT. The delay module compares phase or frequency differences generated when origin signals pass through the control unit and reference unit respectively, and produce delay parameters of the delay module. The signal phase/frequency control module receives and compares the delay parameters to determine an ambient PVT condition for the absolute time delay generating device, so as to control and correct the delay-timing generator and thereby generate accurate absolute time delay. Under various PVT influences, the absolute time delay generating device is capable of generating accurate, absolute time signals.
    Type: Application
    Filed: October 2, 2008
    Publication date: January 21, 2010
    Applicant: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu, Chien-Ying Yu, Juinn-Ting Chen
  • Publication number: 20100013533
    Abstract: A digital delay line includes a plurality of hysteresis-based delay cells electrically connected in series. These hystersis delay units in the hysteresis-based delay cells may be similar or different. All of the hysteresis delay units respectively have an inverter mode and a hesteresis mode. The delay and resolution of the hysteresis delay unit may be derived from the time difference in the inverter mode and hysteresis mode. Such a digital delay line applied to a digital phase locked loop may reduce consumption of area and power.
    Type: Application
    Filed: February 23, 2009
    Publication date: January 21, 2010
    Inventors: Chen-Yi LEE, Jui-Yuan Yu, Juinn-Ting Chen
  • Publication number: 20090278617
    Abstract: This invention discloses a crystal-less communication device and self-calibrated embedded virtual crystal clock generation method. In communication systems, the invention proposes a crystal-less scheme in the device for wireless or wired-line communications. The operation concepts are that the transmitter Device-1 provides Device-2 a reference signal, and Device-2 takes this signal to generate a local signal with the similar frequency that has limited frequency error compared with the one from Device-1. This invention is done via the circuit-design methodology, so it can be implemented from any kinds of circuit implementation processes, especially the CMOS process. As a result, the hardware can be designed in the way of highly integration and extremely low cost. Also, this can largely change and improve existing communications design architecture, hardware cost, and hardware area.
    Type: Application
    Filed: July 25, 2008
    Publication date: November 12, 2009
    Applicant: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu