Abstract: A rapid thermal anneal (RTA) chamber having one or multiple openings in a chamber wall and a reflective index monitor in the opening or openings, respectively. The reflective index monitor or monitors each measures the infrared reflective index of the reflector plate of the rapid thermal anneal chamber, and sends a corresponding signal to a process controller, an alarm, or both a process controller and an alarm. In the event that the measured reflective index of the reflector plate deviates from the reflective index of a control, the process controller terminates heating operation of the chamber to prevent damage to the semiconductor wafer in the chamber. The alarm may be activated to alert personnel to the need for immediate replacement of the contaminated reflector plate.

Abstract: A rapid thermal anneal (RTA) chamber having one or multiple openings in a chamber wall and a reflective index monitor in the opening or openings, respectively. The reflective index monitor or monitors each measures the infrared reflective index of the reflector plate of the rapid thermal anneal chamber, and sends a corresponding signal to a process controller, an alarm, or both a process controller and an alarm. In the event that the measured reflective index of the reflector plate deviates from the reflective index of a control, the process controller terminates heating operation of the chamber to prevent damage to the semiconductor wafer in the chamber. The alarm may be activated to alert personnel to the need for immediate replacement of the contaminated reflector plate.

Abstract: A method for cleaning a silicon-based substrate in an ammonia-containing solution without incurring any damages to the silicon surface by NH4OH vapor is described. The method can be conducted by first providing a silicon-based substrate that has a silicon surface, then forming a silicon oxide layer of very small thickness, i.e. less than 10 Å, on the silicon surface. The silicon-based substrate can then be cleaned in an ammonia-containing solution without incurring any surface damage to the silicon, i.e. such as the formation of silicon holes. The present invention novel method can be carried out by either adding an additional oxidation tank before the SC-1 cleaning tank, or adding an oxidant to a quick dump rinse tank prior to the SC-1 cleaning process.

Abstract: A method for forming a semiconductor device having air regions, the method comprises providing a base, forming a pattern of metal leads, depositing a layer of oxide over the metal leads, forming a layer of nitride over said layer of oxide, opening and etching a trench down to the base layer of material, and depositing and planarizing a dielectric layer. An alternate approach teaches the deposition of a layer of SOG over the layer of oxide that has been deposited over the metal leads, planarizing this layer of SOG down to the top of the metal leads, depositing a layer of PECVD oxide, patterning and etching this layer of PECVD oxide thereby creating openings that are in between the metal leads. The SOG that is between the metal leads can be removed thereby creating air gaps as the Intra-level dielectric for the metal leads.

Abstract: A method for forming a semiconductor device having air regions, the method comprises providing a base, forming a pattern of metal leads, depositing a layer of oxide over the metal leads, forming a layer of nitride over said layer of oxide, opening and etching a trench down to the base layer of material, and depositing and planarizing a dielectric layer. An alternate approach teaches the deposition of a layer of SOG over the layer of oxide that has been deposited over the metal leads, planarizing this layer of SOG down to the top of the metal leads, depositing a layer of PECVD oxide, patterning and etching this layer of PECVD oxide thereby creating openings that are in between the metal leads. The SOG that is between the metal leads can be removed thereby creating air gaps as the intra-level dielectric for the metal leads.

Abstract: A method for forming a semiconductor device having air regions, the method comprises providing a base, forming a pattern of metal leads, depositing a layer of oxide over the metal leads, forming a layer of nitride over said layer of oxide, opening and etching a trench down to the base layer of material, and depositing and planarizing a dielectric layer. An alternate approach teaches the deposition of a layer of SOG over the layer of oxide that has been deposited over the metal leads, planarizing this layer of SOG down to the top of the metal leads, depositing a layer of PECVD oxide, patterning and etching this layer of PECVD oxide thereby creating openings that are in between the metal leads. The SOG that is between the metal leads can be removed thereby creating air gaps as the intra-level dielectric for the metal leads.

Abstract: A method to form polysilicon resistors shielded from hydrogen intrusion is described. A semiconductor substrate is provided. Field oxide isolation regions are provided overlying the substrate. A polysilicon layer is deposited overlying the field oxide regions and the substrate. The polysilicon layer is etched away where it is not covered by a mask to form a polysilicon resistor. An interlevel dielectric layer is deposited overlying the polysilicon resistor. Nitrogen ions are implanted into the interlevel dielectric layer. The interlevel dielectric layer is annealed to form a silicon oxynitride shield layer in the interlevel dielectric layer. Contact openings are etched through the interlevel dielectric layer to the polysilicon resistor. The contact openings are filled with a metal layer. The metal layer is patterned.