Patents by Inventor Juinn-Ting Chen

Juinn-Ting Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7825713
    Abstract: An absolute time delay generating device includes a PVT (process-voltage-temperature) detection device and a delay-timing generator. The PVT detection device includes at least a delay module and a signal phase/frequency control module. The delay module includes a control unit and a reference unit. The control unit differs from the reference unit in sensitivity of delay property to PVT. The delay module compares phase or frequency differences generated when origin signals pass through the control unit and reference unit respectively, and produce delay parameters of the delay module. The signal phase/frequency control module receives and compares the delay parameters to determine an ambient PVT condition for the absolute time delay generating device, so as to control and correct the delay-timing generator and thereby generate accurate absolute time delay. Under various PVT influences, the absolute time delay generating device is capable of generating accurate, absolute time signals.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: November 2, 2010
    Assignee: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu, Chien-Ying Yu, Juinn-Ting Chen
  • Publication number: 20100013533
    Abstract: A digital delay line includes a plurality of hysteresis-based delay cells electrically connected in series. These hystersis delay units in the hysteresis-based delay cells may be similar or different. All of the hysteresis delay units respectively have an inverter mode and a hesteresis mode. The delay and resolution of the hysteresis delay unit may be derived from the time difference in the inverter mode and hysteresis mode. Such a digital delay line applied to a digital phase locked loop may reduce consumption of area and power.
    Type: Application
    Filed: February 23, 2009
    Publication date: January 21, 2010
    Inventors: Chen-Yi LEE, Jui-Yuan Yu, Juinn-Ting Chen
  • Publication number: 20100013536
    Abstract: An absolute time delay generating device includes a PVT (process-voltage-temperature) detection device and a delay-timing generator. The PVT detection device includes at least a delay module and a signal phase/frequency control module. The delay module includes a control unit and a reference unit. The control unit differs from the reference unit in sensitivity of delay property to PVT. The delay module compares phase or frequency differences generated when origin signals pass through the control unit and reference unit respectively, and produce delay parameters of the delay module. The signal phase/frequency control module receives and compares the delay parameters to determine an ambient PVT condition for the absolute time delay generating device, so as to control and correct the delay-timing generator and thereby generate accurate absolute time delay. Under various PVT influences, the absolute time delay generating device is capable of generating accurate, absolute time signals.
    Type: Application
    Filed: October 2, 2008
    Publication date: January 21, 2010
    Applicant: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu, Chien-Ying Yu, Juinn-Ting Chen