Abstract: A method for motion blur in an LED display system includes the steps of connecting an LED display panel to a driver circuit; sending, from a transmitter, image data in a plurality of image frames at a predetermined frame rate and a predetermined refresh rate to the driver circuit, wherein each of the plurality of image frames has a frame time period (Tframe) comprising a plurality of refresh time periods (Trefresh); outputting a driving current in the driver circuit to drive the LED display; and turning off the driving current for a period of time (Tinactive). Tinactive bridges two adjacent frame time periods. The value of Tinactive can be determined according to a viewer of persistence of vision or by calibrating the LED display.

Abstract: A method for generating fractional PWM pulses to drive an light emitting device includes generating multiphase clock signals using a multiphase PLL or DLL includes the steps of generating a plurality of phases of PWM pulses that correspond to a number of phases of the multiphase clock signals, selecting two or more phases amongst the plurality of PWM pulses, performing logic operations of the selected phases of PWM pulses to generate fractional PWM pulses, and generating a driving current using the fractional PWM pulses in a current source. The light emitting device is can be an LED display comprising an LED array having a plurality of channels and a plurality of scan lines. The driving current drives LEDs in one of the plurality of channels.

Abstract: A method for generating fractional PWM pulses to drive an light emitting device includes generating multiphase clock signals using a multiphase PLL or DLL includes the steps of generating a plurality of phases of PWM pulses that correspond to a number of phases of the multiphase clock signals, selecting two or more phases amongst the plurality of PWM pulses, performing logic operations of the selected phases of PWM pulses to generate fractional PWM pulses, and generating a driving current using the fractional PWM pulses in a current source. The light emitting device is can be an LED display comprising an LED array having a plurality of channels and a plurality of scan lines. The driving current drives LEDs in one of the plurality of channels.

Abstract: A method for motion blur in an LED display system includes the steps of connecting an LED display panel to a driver circuit; sending, from a transmitter, image data in a plurality of image frames at a predetermined frame rate and a predetermined refresh rate to the driver circuit, wherein each of the plurality of image frames has a frame time period (Tframe) comprising a plurality of refresh time periods (Trefresh); outputting a driving current in the driver circuit to drive the LED display; and turning off the driving current for a period of time (Tinactive). Tinactive bridges two adjacent frame time periods. The value of Tinactive can be determined according to a viewer of persistence of vision or by calibrating the LED display.

Abstract: An LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: An LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: An LED display device contains an LED display having an array of LED pixels and an electrical system. The electrical system includes a transmitter, a plurality of receiver chips each having a receiver circuitry, and a plurality of driver chips each having a driver circuitry. Alternatively, the receiver circuitry and the driver circuitry are integrated on one chip so that the electrical system contains a number of such chips. The transmitter comprises a memory storing a Gamma correction lookup table and a buffer for storing a LED calibration data. The transmitter receives data packets from a data source, performs Gamma encoding and LED calibration to the data packets. The receiver circuitry is coupled to the transmitter and receives data packets from the transmitter and sends PWM data to a group of LED drivers, which provides current sources to drive the LED array.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, wherein each of the second receiver modules is coupled to at least one of the first receivers and comprises a plurality of second receivers, a plurality of LED driver groups, each of the LED driver groups coupled to at least one of the second receivers and having a plurality of LED drivers, and a transformerless wire link connecting the plurality of first receivers to the plurality of second receiver modules, or the transformerless wire link connecting adjacent receivers of the plurality of second receivers therebetween.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, wherein each of the second receiver modules is coupled to at least one of the first receivers and comprises a plurality of second receivers, a plurality of LED driver groups, each of the LED driver groups coupled to at least one of the second receivers and having a plurality of LED drivers, and a transformerless wire link connecting the plurality of first receivers to the plurality of second receiver modules, or the transformerless wire link connecting adjacent receivers of the plurality of second receivers therebetween.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve VCO, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit implements a binary jump method and an operating curve is selected when the operating curve has an output frequency meeting the target frequency with the control voltage being within a first voltage range being a narrowed and centered voltage range within the control voltage range.

Abstract: A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve VCO, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit implements a binary jump method and an operating curve is selected when the operating curve has an output frequency meeting the target frequency with the control voltage being within a first voltage range being a narrowed and centered voltage range within the control voltage range.

Abstract: A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to perform a closed loop curve search operation to select one of the operating curves in the multi-curve VCO and to perform a curve tracking operation using the selected operating curve, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit increases the charge pump current above a nominal current value during the closed loop curve search operation and set the charge pump current to the nominal current during the curve tracking operation.

Abstract: A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve VCO, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit implements a binary jump method and an operating curve is selected when the operating curve has an output frequency meeting the target frequency with the control voltage being within a first voltage range being a narrowed and centered voltage range within the control voltage range.

Abstract: A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to perform a closed loop curve search operation to select one of the operating curves in the multi-curve VCO and to perform a curve tracking operation using the selected operating curve, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit increases the charge pump current above a nominal current value during the closed loop curve search operation and set the charge pump current to the nominal current during the curve tracking operation.

Abstract: A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve VCO, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit increases the charge pump current above a nominal current value during the closed loop curve search operation and set the charge pump current to the nominal current value after an operating curve is selected.

Abstract: A multi-modulus divider includes a chain of n dual modulus divider cells in cascade and connected in a ripple configuration where the last (n-k) of the divider cells are state-parked dual modulus divider cells. The state-parked dual modulus divider cells are forced to a given logical state when the divider cell is bypassed. The state-parked dual modulus divider cells ensure that the multi-modulus divider can change between different number of cells without clock glitches or clock errors. The multi-modulus divider is therefore capable of achieving a wide division range with seamless transition between division ratios.

Abstract: The present invention relates to a device for detecting an impact and use thereof.

Abstract: A method for designing a noise shaper with a single loop distributed feedback delta-sigma modulator includes following steps: (a) determining a delta-sigma modulator comprising a plurality of parameters according to an order of the noise shaper; (b) deriving a noise transfer function comprising a plurality of coefficients corresponding to the parameters of the delta-sigma modulator according to the delta-sigma modulator; (c) determining a high-pass filter corresponding to the delta-sigma modulator according to a default requirement; (d) solving the coefficients of the noise transfer function according to the high-pass filter; and (e) feeding the solved coefficients in step (d) into the parameters of the delta-sigma modulator for completing the noise shaper.