Abstract: An exemplary method and a control circuit are disclosed for controlling a power semiconductor component by producing a control signal (Ucin) for controlling the component, forming a second control signal (Ucout) in the potential of the controlled component from the control signal (Ucin), measuring a current flowing through the component, and comparing the measured current with a set limit. A fault signal (Ufault) having a logical state is provided on the basis of the comparison between the measured current and the set limit, producing a component control signal (Uave) from the fault signal (Ufault) and the second control signal (Ucout). If a fault is indicated, the component control signal has a value between high and low states, and otherwise the state of the component control signal (Uave) equals the state of the second control signal (Ucout).

Abstract: An exemplary method and a control circuit are disclosed for controlling a power semiconductor component by producing a control signal (Ucin) for controlling the component, forming a second control signal (Ucout) in the potential of the controlled component from the control signal (Ucin), measuring a current flowing through the component, and comparing the measured current with a set limit. A fault signal (Ufault) having a logical state is provided on the basis of the comparison between the measured current and the set limit, producing a component control signal (Uave) from the fault signal (Ufault) and the second control signal (Ucout). If a fault is indicated, the component control signal has a value between high and low states, and otherwise the state of the component control signal (Uave) equals the state of the second control signal (Ucout).