Patents by Inventor Jukka-Pekka Arvo

Jukka-Pekka Arvo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10089774
    Abstract: The disclosed techniques includes generating an input visibility stream for each tile of a frame, the input visibility stream indicating whether or not an input primitive is visible in each tile when rendered, and generating an output visibility stream for each tile of the frame, the output visibility stream indicating whether or not an output primitive is visible in each tile when rendered, wherein the output primitive is produced by tessellating the input primitive. In this way, based on the input visibility stream, tessellation may be skipped for entire input primitive that is not visible in the tile. Also, based on the output visibility stream, tessellation may be skipped for certain ones of the output primitives that are not visible in the tile, even if some of the input primitive is not visible.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: October 2, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Kiia Kaappoo Kallio, Jukka-Pekka Arvo
  • Patent number: 9330475
    Abstract: In an example, a method of coding graphics data comprising a plurality of pixels includes performing, by a graphics processing unit (GPU), multi-sample anti-aliasing to generate one or more sample values for each pixel of the plurality of pixels. The method may also include determining whether pixels comprise edge pixels, where the determination comprises identifying, for each pixel, differing sample values. The method may also include encoding the pixels based on the edge pixel determination.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: May 3, 2016
    Assignee: QUALCOMM Incorporated
    Inventor: Jukka-Pekka Arvo
  • Patent number: 9195501
    Abstract: Aspects of the disclosure are directed to a method of processing data with a graphics processing unit (GPU). According to some aspects, the method includes executing a first work item with a shader processor of the GPU, wherein the first work item includes one or more instructions for processing input data. The method also includes generating one or more values based on a result of the first work item, wherein the one or more values represent one or more characteristics of the result. The method also includes determining whether to execute a second work item based on the one or more values, wherein the second work item includes one or more instructions that are distinct from the one or more instructions of the first work item for processing the input data.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: November 24, 2015
    Assignee: QUALCOMM Incorporated
    Inventor: Jukka-Pekka Arvo
  • Patent number: 9092267
    Abstract: Aspects of this disclosure are directed to a method of processing data with a graphics processing unit (GPU). According to some aspects of the disclosure, the method comprises receiving input defining execution orders for a shader processor, wherein the execution orders comprise a plurality of kernel designations and a plurality of workgroup designations. The method may also include assigning workgroups of kernels identified in the plurality of workgroup designations and the plurality of kernel designations to the shader processor. The method may also include executing, by the shader processor, the workgroups of kernels identified in the plurality of workgroup designations and the plurality of kernel designations to process input data.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: July 28, 2015
    Assignee: QUALCOMM Incorporated
    Inventor: Jukka-Pekka Arvo
  • Patent number: 9019280
    Abstract: This disclosure describes area-based rasterization techniques that can improve the performance of a graphics processor. The techniques may include selecting a rasterization mode for a graphics primitive from a set of at least two candidate rasterization modes based on a metric indicative of an area of the graphics primitive. The techniques may further include performing, with fixed function scan conversion hardware of the graphics processor, scan conversion for the graphics primitive when a first candidate rasterization mode is selected as the rasterization mode for the graphics primitive. The techniques may further include performing, with a programmable shader unit of the graphics processor, scan conversion for the graphics primitive when a second candidate rasterization mode is selected as the rasterization mode for the graphics primitive.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: April 28, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Petri Olavi Nordlund, Jukka-Pekka Arvo
  • Patent number: 8941655
    Abstract: The example techniques described in this disclosure may be directed to interaction between a graphics processing unit (GPU) and a system memory. For example, the GPU may include a memory copy engine that handles tasks related to accessing data that is stored or is to be stored in the system memory. In addition, in some examples, the memory copy engine may perform additional tasks such as modification tasks to increase the performance of the GPU.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: January 27, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Petri Olavi Nordlund, Jukka-Pekka Arvo, Robert J. Simpson
  • Patent number: 8842122
    Abstract: Aspects of the disclosure relate to a method of controlling a graphics processing unit. In an example, the method includes receiving one or more tasks from a host processor, and scheduling, independently from the host processor, the one or more tasks to be selectively executed by a shader processor and one or more fixed function hardware units, wherein the shader processor is configured to execute a plurality of instructions in parallel, and the one or more fixed function hardware units are configured to render graphics data.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: September 23, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Petri Olavi Nordlund, Jukka-Pekka Arvo, Robert J. Simpson
  • Publication number: 20130293565
    Abstract: In an example, a method of coding graphics data comprising a plurality of pixels includes performing, by a graphics processing unit (GPU), multi-sample anti-aliasing to generate one or more sample values for each pixel of the plurality of pixels. The method may also include determining whether pixels comprise edge pixels, where the determination comprises identifying, for each pixel, differing sample values. The method may also include encoding the pixels based on the edge pixel determination.
    Type: Application
    Filed: April 30, 2013
    Publication date: November 7, 2013
    Applicant: QUALCOMM Incorporated
    Inventor: Jukka-Pekka Arvo
  • Publication number: 20130155080
    Abstract: Aspects of the disclosure relate to a method of controlling a graphics processing unit. In an example, the method includes receiving one or more tasks from a host processor, and scheduling, independently from the host processor, the one or more tasks to be selectively executed by a shader processor and one or more fixed function hardware units, wherein the shader processor is configured to execute a plurality of instructions in parallel, and the one or more fixed function hardware units are configured to render graphics data.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 20, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Petri Olavi Nordlund, Jukka-Pekka Arvo, Robert J. Simpson
  • Publication number: 20130120380
    Abstract: The disclosed techniques includes generating an input visibility stream for each tile of a frame, the input visibility stream indicating whether or not an input primitive is visible in each tile when rendered, and generating an output visibility stream for each tile of the frame, the output visibility stream indicating whether or not an output primitive is visible in each tile when rendered, wherein the output primitive is produced by tessellating the input primitive. In this way, based on the input visibility stream, tessellation may be skipped for entire input primitive that is not visible in the tile. Also, based on the output visibility stream, tessellation may be skipped for certain ones of the output primitives that are not visible in the tile, even if some of the input primitive is not visible.
    Type: Application
    Filed: November 16, 2011
    Publication date: May 16, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Kiia Kaappoo Kallio, Jukka-Pekka Arvo
  • Publication number: 20130057562
    Abstract: The example techniques described in this disclosure may be directed to interaction between a graphics processing unit (GPU) and a system memory. For example, the GPU may include a memory copy engine that handles tasks related to accessing data that is stored or is to be stored in the system memory. In addition, in some examples, the memory copy engine may perform additional tasks such as modification tasks to increase the performance of the GPU.
    Type: Application
    Filed: September 7, 2011
    Publication date: March 7, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Petri Olavi Nordlund, Jukka-Pekka Arvo, Robert J. Simpson
  • Publication number: 20130021358
    Abstract: This disclosure describes area-based rasterization techniques that can improve the performance of a graphics processor. The techniques may include selecting a rasterization mode for a graphics primitive from a set of at least two candidate rasterization modes based on a metric indicative of an area of the graphics primitive. The techniques may further include performing, with fixed function scan conversion hardware of the graphics processor, scan conversion for the graphics primitive when a first candidate rasterization mode is selected as the rasterization mode for the graphics primitive. The techniques may further include performing, with a programmable shader unit of the graphics processor, scan conversion for the graphics primitive when a second candidate rasterization mode is selected as the rasterization mode for the graphics primitive.
    Type: Application
    Filed: July 22, 2011
    Publication date: January 24, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Petri Olavi Nordlund, Jukka-Pekka Arvo
  • Publication number: 20130016110
    Abstract: Aspects of the disclosure are directed to a method of processing data with a graphics processing unit (GPU). According to some aspects, the method includes executing a first work item with a shader processor of the GPU, wherein the first work item includes one or more instructions for processing input data. The method also includes generating one or more values based on a result of the first work item, wherein the one or more values represent one or more characteristics of the result. The method also includes determining whether to execute a second work item based on the one or more values, wherein the second work item includes one or more instructions that are distinct from the one or more instructions of the first work item for processing the input data.
    Type: Application
    Filed: July 12, 2011
    Publication date: January 17, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventor: Jukka-Pekka Arvo
  • Publication number: 20120320070
    Abstract: Aspects of this disclosure are directed to a method of processing data with a graphics processing unit (GPU). According to some aspects of the disclosure, the method comprises receiving input defining execution orders for a shader processor, wherein the execution orders comprise a plurality of kernel designations and a plurality of workgroup designations. The method may also include assigning workgroups of kernels identified in the plurality of workgroup designations and the plurality of kernel designations to the shader processor. The method may also include executing, by the shader processor, the workgroups of kernels identified in the plurality of workgroup designations and the plurality of kernel designations to process input data.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Applicant: QUALCOMM Incorporated
    Inventor: Jukka-Pekka Arvo