Abstract: A semiconductor memory device includes a bit line on a substrate and extending in a first direction, first and second active pillars on the bit line, the first active pillar including a first horizontal portion coupled to the bit line and a first vertical portion extending from the first horizontal portion, the second active pillar including a second horizontal portion coupled to the bit line and a second vertical portion extending from the second horizontal portion. First and second word lines are on the first and second horizontal portions of the first and second active pillars, respectively, and extend in a second direction crossing the first direction. A first insulating layer is between the first and second word lines. A first and second side surfaces of the first and second horizontal portions face each other. The first insulating layer includes an air gap between the first and second side surfaces.

Abstract: A semiconductor memory device including a substrate, a plurality of conductive lines extending in a first horizontal direction on the substrate and spaced apart from each other in a second horizontal direction perpendicular to the first horizontal direction, a first cell stack on each of the plurality of conductive lines and including a plurality of first vertical transistor structures and a plurality of first connection contacts, a second cell stack on the first cell stack and including a plurality of second vertical transistor structures and a plurality of second connection contacts, and a plurality of capacitor structures arranged on the second cell stack and connected to the plurality of first vertical transistor structures and the plurality of second vertical transistor structures.