Patents by Inventor Jules Joseph Jelinek

Jules Joseph Jelinek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6760389
    Abstract: A shared data and clock recovery circuit including a clock synthesizer for generating sampling signals having different phases, a multiple transition detector for receiving a data stream and sampling signals, and for detecting edges in a data stream in response to the sampling signals, a counter and accumulator for detecting the time occurrences and total number of edges, and for performing weighted average calculation to select one of the phases, a decision circuit for detecting the phase difference between a source clock and a local clock such that if the PPM difference between the source clock and the local clock is at least 200 PPM, then selection of a phase is based upon stored historical information, and if the PPM difference between the source clock and the local clock is less than 200 PPM, then selection of a phase is based on a weighted averaging calculation.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: July 6, 2004
    Assignee: Agere Systems Inc.
    Inventors: Shankar Ranjan Mukherjee, Jules Joseph Jelinek, Roy Thomas Myers, Jr.
  • Patent number: 6584163
    Abstract: A shared data and clock recovery circuit including a clock synthesizer for generating sampling signals having different phases, a multiple transition detector for receiving a data stream and sampling signals, and for detecting edges in a data stream in response to the sampling signals, a counter and accumulator for detecting the time occurrences and total number of edges, and for performing weighted average calculation to select one of the phases, a decision circuit for detecting the phase difference between a source clock and a local clock such that if the PPM difference between the source clock and the local clock is at least 200 PPM, then selection of a phase is based upon stored historical information, and if the PPM difference between the source clock and the local clock is less than 200 PPM, then selection of a phase is based on a weighted averaging calculation.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: June 24, 2003
    Assignee: Agere Systems Inc.
    Inventors: Roy Thomas Myers, Jr., Shankar Ranjan Mukherjee, Jules Joseph Jelinek
  • Patent number: 6326855
    Abstract: A voltage-to current (V-to-I) converter circuit for use in combination with a current-controlled oscillator (ICO) to form a voltage-controlled oscillator (VCO), wherein the V-to-I converter circuit provides a current to the ICO while this current ranges itself corresponding to the process, supply voltage, and temperature needs of the ICO, thus allowing a more stabilized ICO and VCO. In one embodiment, the V-to-I circuit allows for independent adjustability to compensate for each quantity of required process, supply voltage, and temperature. In another embodiment, the V-to-I circuit includes compensation circuitry for process and temperature only. There is no need for supply voltage compensation because the supply voltage for the V-to-I converter circuit is provided from a supply that has been linearly regulated and preferably built-in on the chip.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: December 4, 2001
    Assignee: Agere Systems, INC
    Inventors: Jules Joseph Jelinek, Michael Arthur Brown, Ramin Shirani
  • Patent number: 6243472
    Abstract: A fully integrated, low cost, amplified electro-acoustic loudspeaker is disclosed in which an amplifier circuit (30, 130, 230, 330, 930, 1030), radio-frequency receiver amplifier circuit (430, 530), optical receiver amplifier circuit (630, 730), or network based amplifier circuit (830) is directly mounted on the loudspeaker's magnetic assembly (105, 505, 705, 805), contained within the loudspeaker's moving assembly (20, 29, 629, 42, 45, 50, 65), or a combination thereof. The amplified loudspeaker's magnetic assembly (5, 105, 405, 505, 705, 805, 905, 1005) is utilized as an electro-magnetic interference shield and/or a heat dissipating element for the attached electronic circuitry. In selected embodiments of the amplified loudspeaker system, the former (42) containing voice coil (45) is additionally utilized for convection cooling of the amplifier circuit (30, 230) or receiver/amplifier circuit combination (430, 630).
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: June 5, 2001
    Inventors: Frank Albert Bilan, Jules Joseph Jelinek
  • Patent number: 6163226
    Abstract: A current-controlled oscillator (ICO) circuit including an all p-channel transistor based ring oscillator, a first current mirroring stage, and a second current mirroring stage. The all p-channel transistor based ring oscillator, p-channel transistors in the input structure of each amplification stage, and metal lines in the ring and from the ring to the amplification stages over an n-well improve noise immunity and tolerance. The first current mirroring stage utilizes an input current to generate a first voltage controlling a series of differential delay cells connected in a ring topology that forms the ring oscillator. The second mirroring stage utilizes a precision current to generate a second voltage controlling at least one amplification stage, which converts corresponding delay cell output signals to a single-ended logic level signal compatible with external circuitry needs.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: December 19, 2000
    Assignee: Lucent Technologies, Inc.
    Inventors: Jules Joseph Jelinek, Michael Arthur Brown, Ramin Shirani
  • Patent number: 5831382
    Abstract: A novel self-supporting flat display screen based on thermionic emission of indirectly heated cathode structures (23, 30, 31, 32, 34; 230, 32, 34) is provided utilizing micro-filament heaters (21) that can be interconnected in any predetermined manner. The planar micro-filament (21) construction utilizes Dewer and Dewer-like techniques (10, 11, 12, 13, 14, 15) for controlling the thermal energy emitted and lowering the power consumption of a display device. Several control electrode techniques (42, 52, 33, 133, 142) are also incorporated in the invention to reduce the voltage levels required to control the display and simplify the overall electronic control circuitry needed by the display device. These techniques are combined to provide a high intensity, high contrast flat panel display using low voltage off-the-shelf electronic driver circuitry.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: November 3, 1998
    Inventors: Frank Albert Bilan, Jules Joseph Jelinek