Patents by Inventor Julia Maria Villen Pizarro

Julia Maria Villen Pizarro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020121915
    Abstract: A method for characterizing defects of integrated circuits on a semiconductor wafer includes storing at least one reference wafer map in a memory corresponding to a known defect pattern of the integrated circuits caused during a manufacturing step thereof, testing the integrated circuits for defects, generating a test wafer map for the semiconductor wafer comprising a pattern of each defective integrated circuit thereon, comparing the test wafer map to the at least one reference wafer map to determine if the known defect pattern is present in the test wafer map, and generating a new reference wafer map corresponding to the test wafer map if the test wafer map has an unknown defect pattern. An apparatus for characterizing defects of integrated circuit die on a semiconductor wafer is also provided.
    Type: Application
    Filed: March 5, 2001
    Publication date: September 5, 2002
    Applicant: Agere Systems Guardian Corp.
    Inventors: Juan Ignacio Alonso Montull, Carlos Ortega, Eliseo Ventura Sobrino Patino, Julia Maria Villen Pizarro