Patents by Inventor Julia Purtell

Julia Purtell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11520311
    Abstract: The present disclosure relates to a device for reading from and/or writing to a removable storage card. The device can comprise a housing including a wall defining a housing opening sized to receive a removable storage card. The device can also comprise a thermal management system attached to at least a part of the wall of the housing. Additionally, the device can comprise a biasing mechanism interoperable with the housing and configured to bias a card surface of the removable storage card into thermal communication with the thermal management system in response to insertion of the removable storage card into the housing opening. In some aspects, the biasing mechanism includes one or more elastic members configured to apply a biasing force to the removable storage card in response to the insertion of the removable storage card into the housing opening.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: December 6, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Lau, Julia Purtell
  • Publication number: 20210026414
    Abstract: The present disclosure relates to a device for reading from and/or writing to a removable storage card. The device can comprise a housing including a wall defining a housing opening sized to receive a removable storage card. The device can also comprise a thermal management system attached to at least a part of the wall of the housing. Further, the device can comprise a biasing mechanism interoperable with the housing and configured to bias the thermal management system into thermal communication with a card surface of the removable storage card in response to insertion of the removable storage card into the housing opening. In some aspects, the biasing mechanism is configured to move from the first position to the second position in response to the insertion of the removable storage card into the housing opening. Also, the biasing mechanism can comprise an elastic member interoperable with the thermal management system.
    Type: Application
    Filed: July 25, 2019
    Publication date: January 28, 2021
    Inventors: Michael LAU, Julia PURTELL
  • Publication number: 20210026328
    Abstract: The present disclosure relates to a device for reading from and/or writing to a removable storage card. The device can comprise a housing including a wall defining a housing opening sized to receive a removable storage card. The device can also comprise a thermal management system attached to at least a part of the wall of the housing. Additionally, the device can comprise a biasing mechanism interoperable with the housing and configured to bias a card surface of the removable storage card into thermal communication with the thermal management system in response to insertion of the removable storage card into the housing opening. In some aspects, the biasing mechanism includes one or more elastic members configured to apply a biasing force to the removable storage card in response to the insertion of the removable storage card into the housing opening.
    Type: Application
    Filed: July 25, 2019
    Publication date: January 28, 2021
    Inventors: Michael LAU, Julia PURTELL
  • Patent number: 10178797
    Abstract: Examples are disclosed that relate to cooling multiple heat-generating components in an electronic device. One example provides a cooling module including an airflow channel downstream of a blower to receive a flow of air generated by the blower, a heat sink extending into the airflow channel and configured to direct air toward a first outlet, and an air-diverting structure positioned within a gap between a distal surface of the heat sink and an opposing interior surface of the airflow channel, the air-diverting structure configured to redirect air flowing in the gap toward a second outlet.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: January 8, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Michael Lau, Julia Purtell, Jeffrey Mark Reents
  • Patent number: 9495491
    Abstract: Embodiments are disclosed that relate to implementing semiconductor device cooling systems that leverage awareness of regional voltage and temperature reliability risk considerations. For example, one disclosed embodiment provides a method of implementing a cooling system configured to cool an integrated circuit. The method involves first determining a heat dissipation factor that would reduce each region of the integrated circuit to a reduced temperature in order to maintain an overall failure rate. An analysis is then performed, using an insight about the relative reliability risk of elevated voltage and temperatures, to identify a region of the integrated circuit whose temperature can be permitted to rise without exceeding the overall failure rate, thereby permitting implementation of a cooling system with a reduced heat dissipation factor.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: November 15, 2016
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Kingsuk Maitra, Tung Thanh Nguyen, Brian Keith Langendorf, Julia Purtell, Rune Hartung Jensen, Ranjit Gannamani, Amit Prabhakar Marathe
  • Publication number: 20150261901
    Abstract: Embodiments are disclosed that relate to implementing semiconductor device cooling systems that leverage awareness of regional voltage and temperature reliability risk considerations. For example, one disclosed embodiment provides a method of implementing a cooling system configured to cool an integrated circuit. The method involves first determining a heat dissipation factor that would reduce each region of the integrated circuit to a reduced temperature in order to maintain an overall failure rate. An analysis is then performed, using an insight about the relative reliability risk of elevated voltage and temperatures, to identify a region of the integrated circuit whose temperature can be permitted to rise without exceeding the overall failure rate, thereby permitting implementation of a cooling system with a reduced heat dissipation factor.
    Type: Application
    Filed: June 27, 2014
    Publication date: September 17, 2015
    Inventors: Kingsuk Maitra, Tung Thanh Nguyen, Brian Keith Langendorf, Julia Purtell, Rune Hartung Jensen, Ranjit Gannamani, Amit Prabhakar Marathe