Abstract: A fluid sensor for sensing a concentration or composition of a fluid, the sensor comprising a first temperature sensing element located on or within a first dielectric membrane and a second temperature sensing element located on or within a second dielectric membrane. An output circuit is configured to measure a differential signal between the first temperature sensing element and the second temperature sensing element. The fluid sensor comprises a first region configured to be exposed to the fluid, and a second region configured to be isolated from the fluid, where the first dielectric membrane is located in the first region, such that in use, the first dielectric membrane is exposed to the fluid, and wherein the second dielectric membrane is located in the second region such that in use, the second dielectric membrane is isolated from the fluid.

Abstract: A device for particle sensing is disclosed. The device includes a sensor including a bulk acoustic wave resonator having a resonant frequency, an acoustic mirror arranged to support the resonator, and a heater in thermal communication with the resonator such that a resonator temperature is based on a heater temperature. The device also includes circuitry connected to the sensor. The circuitry comprises a driver configured to drive the heater with a driver signal having a constant periodic cycle, and an oscillator configured to generate an output signal indicative of the resonant frequency. The resonant frequency is modulated by the resonator temperature.

Abstract: An integrated circuit is disclosed. The integrated circuit comprises a silicon substrate, a sensor comprising a bulk acoustic wave resonator and an acoustic mirror disposed between the bulk acoustic wave resonator and the substrate, and a CMOS circuit supported by substrate and operatively connected to the sensor.

Abstract: We disclose an array of Infra-Red (IR) detectors comprising at least one dielectric membrane formed on a semiconductor substrate comprising an etched portion; at least two IR detectors, and at least one patterned layer formed within or on one or both sides of the said dielectric membrane for controlling the IR absorption of at least one of the IR detectors. The patterned layer comprises laterally spaced structures.

Abstract: It is disclosed herein a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device is made using partly CMOS or CMOS based processing steps, and it includes a semiconductor substrate, a dielectric region over the semiconductor substrate, a heater within the dielectric region and a patterned layer of noble metal above the dielectric region. The method includes the deposition of a photoresist material over the dielectric region, and patterning the photo-resist material to form a patterned region over the dielectric region. The steps of depositing the photo-resist material and patterning the photo-resist material may be performed in sequence using similar photolithography and etching steps to those used in a CMOS process. The resulting semiconductor device is then subjected to further processing steps which ensure that a dielectric membrane and a metal structure within the membrane are formed in the patterned region over the dielectric region.

Abstract: An integrated circuit is disclosed. The integrated circuit comprises a silicon substrate, a sensor comprising a bulk acoustic wave resonator and an acoustic mirror disposed between the bulk acoustic wave resonator and the substrate, and a CMOS circuit supported by substrate and operatively connected to the sensor.

Abstract: We disclose herein a thermal IR detector array device comprising a dielectric membrane, supported by a substrate, the membrane having an array of IR detectors, where the array size is at least 3 by 3 or larger, and there are tracks embedded within the membrane layers to separate each element of the array, the tracks also acting as heatsinks and/or cold junction regions.

Abstract: We disclose herein a thermal IR detector array device comprising a dielectric membrane, supported by a substrate, the membrane having an array of IR detectors, where the array size is at least 3 by 3 or larger, and there are tracks embedded within the membrane layers to separate each element of the array, the tracks also acting as heatsinks and/or cold junction regions.

Abstract: We disclose an array of Infra-Red (IR) detectors comprising at least one dielectric membrane formed on a semiconductor substrate comprising an etched portion; at least two IR detectors, and at least one patterned layer formed within or on one or both sides of the said dielectric membrane for controlling the IR absorption of at least one of the IR detectors. The patterned layer comprises laterally spaced structures.

Abstract: It is disclosed herein a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device is made using partly CMOS or CMOS based processing steps, and it includes a semiconductor substrate, a dielectric region over the semiconductor substrate, a heater within the dielectric region and a patterned layer of noble metal above the dielectric region. The method includes the deposition of a photoresist material over the dielectric region, and patterning the photo-resist material to form a patterned region over the dielectric region. The steps of depositing the photo-resist material and patterning the photo-resist material may be performed in sequence using similar photolithography and etching steps to those used in a CMOS process. The resulting semiconductor device is then subjected to further processing steps which ensure that a dielectric membrane and a metal structure within the membrane are formed in the patterned region over the dielectric region.

Abstract: An infra-red (IR) device comprising a dielectric membrane formed on a silicon substrate comprising an etched portion; and at least one patterned layer formed within or on the dielectric membrane for controlling IR emission or IR absorption of the IR device, wherein the at least one patterned layer comprises laterally spaced structures.

Abstract: An IR source in the form of a micro-hotplate device including a CMOS metal layer made of at least one layer of embedded on a dielectric membrane supported by a silicon substrate. The device is formed in a CMOS process followed by a back etching step. The IR source also can be in the form of an array of small membranes —closely packed as a result of the use of the deep reactive ion etching technique and having better mechanical stability due to the small size of each membrane while maintaining the same total IR emission level. SOI technology can be used to allow high ambient temperature and allow the integration of a temperature sensor, preferably in the form of a diode or a bipolar transistor right below the IR source.

Abstract: An infra-red (IR) device comprising a dielectric membrane formed on a silicon substrate comprising an etched portion; and at least one patterned layer formed within or on the dielectric membrane for controlling IR emission or IR absorption of the IR device, wherein the at least one patterned layer comprises laterally spaced structures.

Abstract: An IR detector in the form of a thermopile including one or more thermocouples on a dielectric membrane supported by a silicon substrate. Each thermocouple is composed of two materials, at least one of which is p-doped or n-doped single crystal silicon. The device is formed in an SOI process. The device is advantageous as the use of single crystal silicon reduces the noise in the output signal, allows higher reproducibility of the geometrical and physical properties of the layer and in addition, the use of an SOI process allows a temperature sensor, as well as circuitry to be fabricated on the same chip. The detector can also have an IR filter wafer bonded onto it and/or have arrays of thermopiles to increase the sensitivity. The devices can also be integrated with an IR source on the same silicon chip and packaged to form a complete and miniaturised NDIR sensor.

Abstract: An IR source in the form of a micro-hotplate device including a CMOS metal layer made of at least one layer of embedded on a dielectric membrane supported by a silicon substrate. The device is formed in a CMOS process followed by a back etching step. The IR source also can be in the form of an array of small membranes—closely packed as a result of the use of the deep reactive ion etching technique and having better mechanical stability due to the small size of each membrane while maintaining the same total IR emission level. SOI technology can be used to allow high ambient temperature and allow the integration of a temperature sensor, preferably in the form of a diode or a bipolar transistor right below the IR source.

Abstract: A gas-sensing semiconductor device is fabricated on a silicon substrate having a thin silicon oxide insulating layer in which a resistive heater made of a CMOS compatible high temperature metal is embedded. The high temperature metal is tungsten. The device includes at least one sensing area provided with a gas-sensitive layer separated from the heater by an insulating layer. As one of the final fabrication steps, the substrate is back-etched so as to form a thin membrane in the sensing area. Except for the back-etch and the gas-sensitive layer formation, that are carried out post-CMOS, all other layers, including the tungsten resistive heater, are made using a CMOS process employing tungsten metallisation. The device can be monolithically integrated with the drive, control and transducing circuitry using low cost CMOS processing. The heater, the insulating layer and other layers are made within the CMOS sequence and they do not require extra masks or processing.

Abstract: A gas-sensing semiconductor device 1 is fabricated on a silicon substrate 2 having a thin silicon oxide insulating layer 3 on one side and a thin silicon layer 4 on top of the insulating layer 3 using CMOS SOI technology. The silicon layer 4 may be in the form of an island surrounded by a silicon oxide insulating barrier layer 4 formed by the known LOCOS oxidation technique, although other lateral isolation techniques may also be used. The device 1 includes at least one sensing area provided with a gas-sensitive layer 18, a MOSFET heater 6 for heating the gas-sensitive layer 18 to promote gas reaction with the gas-sensitive layer 18 and a sensor 16, which may be in the form of a chemoresistor, for providing an electrical output indicative of gas reaction with the gas-sensitive layer 18. As one of the final fabrication steps, the substrate 2 is back-etched so as to form a thin membrane 20 in the sensing area. Such a device can be produced at low cost using conventional CMOS SOI technology.