Abstract: Apparatus and methods of calibrating a power amplifier system to compensate for envelope amplitude misalignment are provided. In certain configurations, a method of calibrating a power amplifier system includes generating a supply voltage of a power amplifier using an envelope tracker based on shaping a scaled envelope signal using shaping data generated at a target gain compression, controlling a variable gain of a variable gain amplifier based on a gain control level signal, changing the variable gain by adjusting the gain control level signal using a calibration module, monitoring an output of the power amplifier to determine an amount of variable gain at which a detected gain compression of the power amplifier corresponds to the target gain compression of the shaping data, and calibrating the power amplifier system to compensate for envelope amplitude misalignment based on the determined amount of variable gain.

Abstract: Methods of calibrating a power amplifier system to compensate for envelope amplitude misalignment are provided. In certain configurations, a method of calibrating a power amplifier system includes amplifying a radio frequency signal from a transceiver using a power amplifier and generating a supply voltage of the power amplifier using an envelope tracker, including generating a scaled envelope signal based on a power control level signal and an envelope signal, and shaping the scaled envelope signal using a shaping table generated at a target gain compression. The method further includes changing a scaling of the scaled envelope signal using a calibration module, monitoring an output of the power amplifier to determine an amount of scaling of the scaled envelope signal at which a detected gain compression of the power amplifier corresponds to the target gain compression of the shaping table, and calibrating the power amplifier system based on the determination.

Abstract: Methods of calibrating a power amplifier system to compensate for envelope amplitude misalignment are provided. In certain configurations, a method of calibrating a power amplifier system includes amplifying a radio frequency signal from a transceiver using a power amplifier and generating a supply voltage of the power amplifier using an envelope tracker, including generating a scaled envelope signal based on a power control level signal and an envelope signal, and shaping the scaled envelope signal using a shaping table generated at a target gain compression. The method further includes changing a scaling of the scaled envelope signal using a calibration module, monitoring an output of the power amplifier to determine an amount of scaling of the scaled envelope signal at which a detected gain compression of the power amplifier corresponds to the target gain compression of the shaping table, and calibrating the power amplifier system based on the determination.

Abstract: Apparatus and methods for calibration of envelope trackers are provided. In one embodiment, a power amplifier system includes a VGA that amplifies an RF input signal to generate an amplified RF input signal, a power amplifier that amplifies the amplified RF input signal to generate an RF output signal, and an envelope tracker that generates a supply voltage for the power amplifier. The envelope tracker includes a scaling module that generates a scaled envelope signal based on a power control level (PCL) signal and an envelope signal that changes in relation to an envelope of the RF input signal. The envelope tracker further includes a calibration module that controls an amount of scaling of the scaled envelope signal based on calibration data to compensate for an envelope amplitude misalignment of the envelope tracker. The envelope tracker controls the voltage level of the supply voltage based on the scaled envelope signal.

Abstract: Apparatus and methods for calibration of envelope trackers are provided. In one embodiment, a power amplifier system includes a VGA that amplifies an RF input signal to generate an amplified RF input signal, a power amplifier that amplifies the amplified RF input signal to generate an RF output signal, and an envelope tracker that generates a supply voltage for the power amplifier. The envelope tracker includes a scaling module that generates a scaled envelope signal based on a power control level (PCL) signal and an envelope signal that changes in relation to an envelope of the RF input signal. The envelope tracker further includes a calibration module that controls an amount of scaling of the scaled envelope signal based on calibration data to compensate for an envelope amplitude misalignment of the envelope tracker. The envelope tracker controls the voltage level of the supply voltage based on the scaled envelope signal.

Abstract: Apparatus and methods for envelope tracking calibration are provided. In one embodiment, a power amplifier system includes a power amplifier, an envelope tracker that generates the power amplifier's supply voltage, a power detector, and a calibration module. The envelope tracker includes an envelope shaping table generated at a desired gain compression and a scaling module that scales an amplitude of an envelope signal. The power detector measures the power amplifier's output power, and the calibration module provides calibration data to the scaling module to change the scaling of the envelope signal's amplitude. The calibration module sets the calibration data to a first value corresponding to a supply voltage level associated with substantially no gain compression, and reduces the supply voltage level by changing the calibration data until the power detector indicates that the gain compression of the power amplifier is about equal to the desired gain compression.

Abstract: Apparatus and methods for envelope tracking calibration are provided. In one embodiment, a power amplifier system includes a power amplifier, an envelope tracker that generates the power amplifier's supply voltage, a power detector, and a calibration module. The envelope tracker includes an envelope shaping table generated at a desired gain compression and a scaling module that scales an amplitude of an envelope signal. The power detector measures the power amplifier's output power, and the calibration module provides calibration data to the scaling module to change the scaling of the envelope signal's amplitude. The calibration module sets the calibration data to a first value corresponding to a supply voltage level associated with substantially no gain compression, and reduces the supply voltage level by changing the calibration data until the power detector indicates that the gain compression of the power amplifier is about equal to the desired gain compression.

Abstract: There is disclosed a technique for controlling at least one amplification stage, comprising: selecting a linearity objective for the amplification stage; in dependence on an input signal to said amplification stage, determining a combination of supply input and bias input for the amplification stage in order to meet said linearity objective; and in dependence on there being more than one combination of supply input and bias input for meeting the linearity objective, selecting the combination that optimises a further system performance objective for the amplification stage. The further system performance objective may be one or more of: an efficiency objective; an envelope signal bandwidth objective; or a robustness to production tolerance objective.

Abstract: Apparatus and methods for envelope tracking calibration are provided. In one embodiment, a method of calibrating an envelope tracker having an envelope shaping table generated at a desired gain compression of a power amplifier is provided. The method includes generating a supply voltage for the power amplifier using the envelope tracker, operating the supply voltage of the power amplifier at a first voltage level associated with substantially no gain compression of the power amplifier, and measuring an output power of the power amplifier at the first voltage level. The method further includes decreasing a voltage level of the supply voltage one or more times and measuring the output power at each voltage level, determining a second voltage level of the power amplifier associated with a gain compression equal to about that of the desired gain compression, and calibrating the envelope tracker based on the determination.

Abstract: There is disclosed a technique for controlling at least one amplification stage, comprising: selecting a linearity objective for the amplification stage; in dependence on an input signal to said amplification stage, determining a combination of supply input and bias input for the amplification stage in order to meet said linearity objective; and in dependence on there being more than one combination of supply input and bias input for meeting the linearity objective, selecting the combination that optimizes a further system performance objective for the amplification stage. The further system performance objective may be one or more of: an efficiency objective; an envelope signal bandwidth objective; or a robustness to production tolerance objective.

Abstract: Apparatus and methods for envelope tracking calibration are provided. In one embodiment, a method of calibrating an envelope tracker having an envelope shaping table generated at a desired gain compression of a power amplifier is provided. The method includes generating a supply voltage for the power amplifier using the envelope tracker, operating the supply voltage of the power amplifier at a first voltage level associated with substantially no gain compression of the power amplifier, and measuring an output power of the power amplifier at the first voltage level. The method further includes decreasing a voltage level of the supply voltage one or more times and measuring the output power at each voltage level, determining a second voltage level of the power amplifier associated with a gain compression equal to about that of the desired gain compression, and calibrating the envelope tracker based on the determination.

Abstract: There is disclosed a technique for controlling at least one amplification stage, comprising: selecting a linearity objective for the amplification stage; in dependence on an input signal to said amplification stage, determining a combination of supply input and bias input for the amplification stage in order to meet said linearity objective; and in dependence on there being more than one combination of supply input and bias input for meeting the linearity objective, selecting the combination that optimises a further system performance objective for the amplification stage. The further system performance objective may be one or more of: an efficiency objective; an envelope signal bandwidth objective; or a robustness to production tolerance objective.

Abstract: There is disclosed a technique for controlling at least one amplification stage, comprising: selecting a linearity objective for the amplification stage; in dependence on an input signal to said amplification stage, determining a combination of supply input and bias input for the amplification stage in order to meet said linearity objective; and in dependence on there being more than one combination of supply input and bias input for meeting the linearity objective, selecting the combination that optimizes a further system performance objective for the amplification stage. The further system performance objective may be one or more of: an efficiency objective; an envelope signal bandwidth objective; or a robustness to production tolerance objective.

Abstract: There is disclosed a technique for controlling at least one amplification stage, comprising: selecting a linearity objective for the amplification stage; in dependence on an input signal to said amplification stage, determining a combination of supply input and bias input for the amplification stage in order to meet said linearity objective; and in dependence on there being more than one combination of supply input and bias input for meeting the linearity objective, selecting the combination that optimises a further system performance objective for the amplification stage. The further system performance objective may be one or more of: an efficiency objective; an envelope signal bandwidth objective; or a robustness to production tolerance objective.

Abstract: In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.

Abstract: A communication apparatus includes a phase-locked loop circuit which receives a first signal having a frequency and converts it into an output signal having a transmission frequency and includes a current output type phase comparator which converts a phase difference between the first signal and a second signal into a current signal, a low pass filter which filters the current signal of the current output type phase comparator to produce an output signal a voltage controlled oscillator which produces an output signal having a transmission frequency corresponding to the output signal of the low pass filter the output signal of the voltage controlled oscillator constituting the output signal of the phase-locked loop circuit, a frequency converter which frequency-converts the output signal of the voltage controlled oscillator to produce the second signal, and a current source which supplies a current to an input of the low pass filter.

Abstract: There are provided a transmitter and a wireless communication terminal apparatus using the same for solving a problem of undesired spurs due to harmonics of an output signal of a frequency synthesizer, and further solving a problem of the undesired spurs occurring when the harmonics of an output signal of a crystal oscillator are mixed into a VCO to facilitate to design a circuit or a mounting substrate. The transmitter has a relationship between an output frequency of a PLL frequency conversion circuit (5) and output frequencies of frequency synthesizers (1, 2) stored therein, and the output frequencies of the frequency synthesizers (1, 2) input into the PLL frequency conversion circuit (5) are controlled on the basis of the relationship so that the undesired spurs are suppressed.

Abstract: In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.

Abstract: In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.

Abstract: In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.