Patents by Inventor Julian Leyh
Julian Leyh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11791928Abstract: A digital data rate enhancement filter is described. The digital data rate enhancement filter-includes an enhancement filter input, a first interpolation filter, a second interpolation filter, and a multiplexer circuit. The first interpolation filter is connected to the enhancement filter input downstream of the enhancement filter input. The second interpolation filter is connected to the first interpolation filter downstream of the first interpolation filter. The enhancement filter input is configured to receive a digital input signal set. The first interpolation filter is configured to receive the digital input signal set and to interpolate the digital input signal set, thereby obtaining a first interpolated signal set. The second interpolation filter is configured to receive the first interpolated signal set and to interpolate the first interpolated signal set, thereby obtaining a second interpolated signal set.Type: GrantFiled: October 5, 2021Date of Patent: October 17, 2023Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Manuel Stein, Julian Leyh
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Publication number: 20230179180Abstract: A digital filter circuit is described. The digital filter circuit includes a pre-adder circuit, a convolution circuit, and a post-adder circuit. The pre-adder circuit includes a number of n pre-adder sub-circuits, wherein n is an integer greater than or equal to 2. The convolution circuit includes a number of m convolution sub-circuits, wherein m is an integer. The post-adder circuit includes a number of k post-adder sub-circuits, wherein k is an integer greater than or equal to 2. The number m of convolution sub-circuits is greater than the number n of pre-adder sub-circuits of the pre-adder circuit. The number m of convolution sub-circuits is greater than the number k of post-adder sub-circuits of the post-adder circuit. Further, an electronic device is described.Type: ApplicationFiled: February 15, 2022Publication date: June 8, 2023Applicant: Rohde & Schwarz GmbH & Co. KGInventors: Julian Leyh, Michael Vonbun, Andreas Oeldemann
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Publication number: 20230105455Abstract: A digital data rate enhancement filter is described. The digital data rate enhancement filter-includes an enhancement filter input, a first interpolation filter, a second interpolation filter, and a multiplexer circuit. The first interpolation filter is connected to the enhancement filter input downstream of the enhancement filter input. The second interpolation filter is connected to the first interpolation filter downstream of the first interpolation filter. The enhancement filter input is configured to receive a digital input signal set. The first interpolation filter is configured to receive the digital input signal set and to interpolate the digital input signal set, thereby obtaining a first interpolated signal set. The second interpolation filter is configured to receive the first interpolated signal set and to interpolate the first interpolated signal set, thereby obtaining a second interpolated signal set.Type: ApplicationFiled: October 5, 2021Publication date: April 6, 2023Applicant: Rohde & Schwarz GmbH & Co. KGInventors: Manuel Stein, Julian Leyh
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Patent number: 11346884Abstract: A signal analysis method is disclosed. The method comprises the following steps: An input signal comprising a symbol sequence is received, wherein the input signal is associated with a first clock signal comprising at least one jitter component. A second clock signal is recovered based on said input signal. At least one jitter parameter is determined that is associated with said at least one jitter component. A jitter signal is reconstructed based on said at least one jitter parameter, wherein said jitter signal is associated with said at least one jitter component. A third clock signal is determined based on said second clock signal and said jitter signal. Further, a measurement instrument is disclosed.Type: GrantFiled: November 22, 2019Date of Patent: May 31, 2022Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Adrian Ispas, Julian Leyh
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Publication number: 20210359772Abstract: A method of analyzing at least one periodic horizontal impairment component of an input signal is described. The input signal is received that includes at least a periodic horizontal impairment component. The at least one periodic horizontal impairment component is analyzed based on a first model, thereby obtaining a first estimated parameter set for each analyzed periodic horizontal impairment component. The at least one periodic horizontal impairment component is analyzed based on a second model, thereby obtaining a second estimated parameter set for each analyzed periodic horizontal impairment component. The first model is different to the second model. Further, the present disclosure provides a measurement instrument.Type: ApplicationFiled: May 22, 2020Publication date: November 18, 2021Applicant: Rohde & Schwarz GmbH & Co. KGInventors: Adrian Ispas, Julian Leyh
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Patent number: 11177892Abstract: A method of analyzing at least one periodic horizontal impairment component of an input signal is described. The input signal is received that includes at least a periodic horizontal impairment component. The at least one periodic horizontal impairment component is analyzed based on a first model, thereby obtaining a first estimated parameter set for each analyzed periodic horizontal impairment component. The at least one periodic horizontal impairment component is analyzed based on a second model, thereby obtaining a second estimated parameter set for each analyzed periodic horizontal impairment component. The first model is different to the second model. Further, the present disclosure provides a measurement instrument.Type: GrantFiled: May 22, 2020Date of Patent: November 16, 2021Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Adrian Ispas, Julian Leyh
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Patent number: 11047897Abstract: A signal analysis method for determining at least one perturbance component of an input signal is described, wherein the perturbance is associated with at least one of jitter and noise.Type: GrantFiled: August 13, 2020Date of Patent: June 29, 2021Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Adrian Ispas, Julian Leyh
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Publication number: 20210156915Abstract: A signal analysis method is disclosed. The method comprises the following steps: An input signal comprising a symbol sequence is received, wherein the input signal is associated with a first clock signal comprising at least one jitter component. A second clock signal is recovered based on said input signal. At least one jitter parameter is determined that is associated with said at least one jitter component. A jitter signal is reconstructed based on said at least one jitter parameter, wherein said jitter signal is associated with said at least one jitter component. A third clock signal is determined based on said second clock signal and said jitter signal. Further, a measurement instrument is disclosed.Type: ApplicationFiled: November 22, 2019Publication date: May 27, 2021Applicant: Rohde & Schwarz GmbH & Co. KGInventors: Adrian Ispas, Julian Leyh
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Patent number: 10992450Abstract: A signal processing method is described. The signal processing method comprises the following steps: An input signal is received. The input signal is processed from a start point to a preliminary stop point based on at least one first processing parameter, thereby obtaining a first processed signal. The at least one first processing parameter is adapted based on the first processed signal, thereby obtaining at least one second processing parameter. The input signal is processed from the preliminary stop point to the start point based on the at least one second processing parameter, thereby obtaining a second processed signal. At least one output parameter is generated and/or an output signal is synchronized with the input signal based on the second processed signal. Further, a signal analysis module is described.Type: GrantFiled: March 5, 2020Date of Patent: April 27, 2021Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Julian Leyh, Bendix Koopmann
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Patent number: 10924260Abstract: A signal analysis method is described. The signal analysis method includes the following steps. A first difference quantity is determined based on a first set of samples by a first polyphase filter, wherein the first set of samples includes at least two input samples. A second difference quantity is determined based on a second set of samples by a second polyphase filter, wherein the second set of samples includes at least two input samples, wherein the input samples associated with the second set of samples are time-shifted with respect to the input samples associated with the first set of samples. The first difference quantity and the second difference quantity are compared based on a predefined criterion. At least one timing parameter of the symbol sequence is determined based on the comparison of the first difference quantity and the second difference quantity. Further, a signal processing module is described.Type: GrantFiled: May 15, 2020Date of Patent: February 16, 2021Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Michael Reinhold, Adrian Ispas, Julian Leyh
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Publication number: 20210018548Abstract: A signal analysis method for determining at least one perturbance component of an input signal is described, wherein the perturbance is associated with at least one of jitter and noise.Type: ApplicationFiled: August 13, 2020Publication date: January 21, 2021Applicant: Rohde & Schwarz GmbH & Co. KGInventors: Adrian Ispas, Julian Leyh
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Patent number: 10826678Abstract: A method for recovering a clock signal from an input signal is disclosed. The method comprises the following steps: An input signal that comprises a symbol sequence having symbol edges is received. Edge timings of the symbol edges are determined, thereby generating an edge signal, the edge signal comprising information on the edge timings. The edge signal is processed via a filter module comprising a time variant filter, thereby generating the clock signal, the clock signal comprising information on at least one clock timing parameter. Further, a clock recovery module and a computer program are disclosed.Type: GrantFiled: November 6, 2019Date of Patent: November 3, 2020Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Julian Leyh, Adrian Ispas