Patents by Inventor Julian Velev

Julian Velev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9871193
    Abstract: The present invention relates to magnetic random access memory (MRAM) storage devices based on multiferroic tunnel junctions in which ferroelectric polarization is used to control and manipulate the memory state. Invention methods include: (1) method of producing tunneling electroresistance (TER) effect in multiferroic tunnel junction (MFTJ) at finite bias; (2) method of controlling the TER effect in an MFTJ at infinite bias via the switching of the relative orientation of the ferromagnetic leads; (3) method of producing monotonous bias dependence of the tunneling magnetoresistance (TMR) in a MFTJ; (4) method of controlling the size and direction of the parallel spin transfer torque (STT) component and the perpendicular STT component across the MFTJ; (5) method of producing a monotonous bias dependence of the perpendicular STT component across an MFTJ; and (6) method of controlling the size and sign of the interlayer exchange coupling in an MFTJ.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: January 16, 2018
    Assignee: CALIFORNIA STATE UNIVERSITY, NORTHRIDGE
    Inventors: Nicholas Kioussis, Julian Velev, Alan Kalitsov, Artur Useinov
  • Publication number: 20160043307
    Abstract: The present invention relates to magnetic random access memory (MRAM) storage devices based on multiferroic tunnel junctions in which ferroelectric polarization is used to control and manipulate the memory state. Invention methods include: (1) method of producing tunneling electroresistance (TER) effect in multiferroic tunnel junction (MFTJ) at finite bias; (2) method of controlling the TER effect in an MFTJ at infinite bias via the switching of the relative orientation of the ferromagnetic leads; (3) method of producing monotonous bias dependence of the tunneling magnetoresistance (TMR) in a MFTJ; (4) method of controlling the size and direction of the parallel spin transfer torque (STT) component and the perpendicular STT component across the MFTJ; (5) method of producing a monotonous bias dependence of the perpendicular STT component across an MFTJ; and (6) method of controlling the size and sign of the interlayer exchange coupling in an MFTJ.
    Type: Application
    Filed: August 4, 2015
    Publication date: February 11, 2016
    Inventors: Nicholas Kioussis, Julian Velev, Alan Kalitsov, Artur Useinov
  • Patent number: 7538987
    Abstract: A CPP spin-valve element formed on a substrate including a free layer structure including at least one ferromagnetic layer and a pinned layer structure including at least one ferromagnetic layer. The free layer is magnetically softer than the pinned layer. A thin non-magnetic spacer layer structure configured to separate the free layer and the pinned layer is provided in order to prevent a magnetic coupling between the free and pinned layer structures, and to allow an electric current to go there through. At least two current-confining (CC) layer structures including at least two parts having significantly different current conductivities are incorporated therein.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: May 26, 2009
    Assignees: University of Alabama, Fujitsu, Ltd.
    Inventors: Hideo Fujiwara, Keiichi Nagasaka, Tong Zhao, William H. Butler, Julian Velev, Amrit Bandyopadhyay
  • Publication number: 20050002126
    Abstract: A CPP spin-valve element formed on a substrate including a free layer structure including at least one ferromagnetic layer and a pinned layer structure including at least one ferromagnetic layer. The free layer is magnetically softer than the pinned layer. A thin non-magnetic spacer layer structure configured to separate the free layer and the pinned layer is provided in order to prevent a magnetic coupling between the free and pinned layer structures, and to allow an electric current to go there through. At least two current-confining (CC) layer structures including at least two parts having significantly different current conductivities are incorporated therein.
    Type: Application
    Filed: July 3, 2003
    Publication date: January 6, 2005
    Applicants: THE UNIVERSITY OF ALABAMA, FUJITSU LIMITED
    Inventors: Hideo Fujiwara, Keiichi Nagasaka, Tong Zhao, William Bulter, Julian Velev, Amrit Bandyopadhyay