Patents by Inventor Julien Freche
Julien Freche has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11782828Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using virtblocks are provided. In one set of embodiments, a host system can maintain, in the NVM device, a pointer entry (i.e., virtblock entry) for each allocated data block of the NVM region, where page table entries of the NVM region that refer to the allocated data block include pointers to the pointer entry, and where the pointer entry includes a pointer to the allocated data block. The host system can further determine that a subset of the allocated data blocks of the NVM region are non-active blocks and can purge the non-active blocks from the NVM device to a mass storage device, where the purging comprises updating the pointer entry for each non-active block to point to a storage location of the non-active block on the mass storage device.Type: GrantFiled: January 7, 2022Date of Patent: October 10, 2023Assignee: VMware, Inc.Inventors: Xavier Deguillard, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Rajesh Venkatasubramanian
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Patent number: 11669369Abstract: Various examples are disclosed for cluster resource management using adaptive memory demands. In some examples, a local memory estimate is determined for a workload. The local memory estimate is determined using a memory reclamation parameter for the workload executed by a current host of the workload. A destination memory estimate is also determined for the workload. The destination memory estimate is determined using a full memory estimate unreduced by memory reclamation parameters. The workload is executed using a host that is selected in view of an analysis that uses the local memory estimate for the current host and the destination memory estimate for at least one destination host.Type: GrantFiled: September 3, 2021Date of Patent: June 6, 2023Assignee: VMWARE, INC.Inventors: Zhelong Pan, Rajesh Venkatasubramanian, Julien Freche, Prashanth Victor
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Publication number: 20220129377Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using virtblocks are provided. In one set of embodiments, a host system can maintain, in the NVM device, a pointer entry (i.e., virtblock entry) for each allocated data block of the NVM region, where page table entries of the NVM region that refer to the allocated data block include pointers to the pointer entry, and where the pointer entry includes a pointer to the allocated data block. The host system can further determine that a subset of the allocated data blocks of the NVM region are non-active blocks and can purge the non-active blocks from the NVM device to a mass storage device, where the purging comprises updating the pointer entry for each non-active block to point to a storage location of the non-active block on the mass storage device.Type: ApplicationFiled: January 7, 2022Publication date: April 28, 2022Inventors: Xavier Deguillard, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Rajesh Venkatasubramanian
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Patent number: 11249900Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using virtblocks are provided. In one set of embodiments, a host system can maintain, in the NVM device, a pointer entry (i.e., virtblock entry) for each allocated data block of the NVM region, where page table entries of the NVM region that refer to the allocated data block include pointers to the pointer entry, and where the pointer entry includes a pointer to the allocated data block. The host system can further determine that a subset of the allocated data blocks of the NVM region are non-active blocks and can purge the non-active blocks from the NVM device to a mass storage device, where the purging comprises updating the pointer entry for each non-active block to point to a storage location of the non-active block on the mass storage device.Type: GrantFiled: October 29, 2018Date of Patent: February 15, 2022Assignee: VMWARE, INC.Inventors: Xavier Deguillard, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Rajesh Venkatasubramanian
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Publication number: 20210397480Abstract: Various examples are disclosed for cluster resource management using adaptive memory demands. In some examples, a local memory estimate is determined for a workload. The local memory estimate is determined using a memory reclamation parameter for the workload executed by a current host of the workload. A destination memory estimate is also determined for the workload. The destination memory estimate is determined using a full memory estimate unreduced by memory reclamation parameters. The workload is executed using a host that is selected in view of an analysis that uses the local memory estimate for the current host and the destination memory estimate for at least one destination host.Type: ApplicationFiled: September 3, 2021Publication date: December 23, 2021Inventors: Zhelong Pan, Rajesh Venkatasubramanian, Julien Freche, Prashanth Victor
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Patent number: 11188370Abstract: A memory scheduler in a hypervisor allocates physical memory to virtual machines (VMs) based on memory usages metrics generated within the VMs and provided to the hypervisor. More particularly, the memory scheduler determines an allocation target for each VM based on a guest-generated memory usage metric associated with the VM. The allocation target can be increased or decreased from its previous value to reflect changing needs in the VM. Physical memory is allocated when a VM requests it, and is reclaimed during a reclamation process based on its associated allocation target.Type: GrantFiled: January 24, 2019Date of Patent: November 30, 2021Assignee: VMware, Inc.Inventors: Julien Freche, Philip Peter Moltmann, Jui-Hao Chiang
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Patent number: 11182182Abstract: A method of probing a computer system includes steps of compiling a script that includes a call to a first function with first parameters, to generate executable code that includes a call to a second function with second parameters, wherein the second function and the second parameters are specified as values of the first parameters of the first function in the call to the first function, injecting the executable code into an executing module of the computer system, and as the executing module is running, executing the executable code to call the second function.Type: GrantFiled: July 24, 2019Date of Patent: November 23, 2021Assignee: VMware, Inc.Inventors: Julien Freche, Ashish Kaila, Lorenzo David, Abhishek Srivastava, Nahim El Atmani
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Patent number: 11113109Abstract: Various examples are disclosed for cluster resource management using adaptive memory demands. Some aspects involve determining a destination memory estimate and a local memory estimate for various workloads executing in a datacenter. Goodness scores are determined corresponding to the candidate workload being executed on a number of different hosts. The goodness scores are determined using the local memory estimates for the currently executing workloads, the destination memory estimate is utilized for the candidate workload if it is not executing on the corresponding host. The workloads are balanced based on the goodness scores.Type: GrantFiled: January 14, 2020Date of Patent: September 7, 2021Assignee: VMWARE, INC.Inventors: Zhelong Pan, Rajesh Venkatasubramanian, Julien Freche, Prashanth Victor
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Patent number: 11093403Abstract: The disclosure provides a technique for reducing cache misses to a cache of a computer system. The technique includes deallocating memory pages of the cache from one process and allocating those memory pages to another process based on cache misses of each process during a given time period. Repeating the technique leads the total number of cache misses to the cache to gradually decrease to an optimum or near optimum level. The repetition of the technique leads to a dynamic and flexible apportionment of cache memory pages to processes running within the computer system.Type: GrantFiled: December 4, 2018Date of Patent: August 17, 2021Assignee: VMware, Inc.Inventors: Wenguang Wang, Abhishek Srivastava, Ashish Kaila, Julien Freche
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Publication number: 20210216372Abstract: Various examples are disclosed for cluster resource management using adaptive memory demands. Some aspects involve determining a destination memory estimate and a local memory estimate for various workloads executing in a datacenter. Goodness scores are determined corresponding to the candidate workload being executed on a number of different hosts. The goodness scores are determined using the local memory estimates for the currently executing workloads, the destination memory estimate is utilized for the candidate workload if it is not executing on the corresponding host. The workloads are balanced based on the goodness scores.Type: ApplicationFiled: January 14, 2020Publication date: July 15, 2021Inventors: Zhelong Pan, Rajesh Venkatasubramanian, Julien Freche, Prashanth Victor
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Patent number: 11029863Abstract: Techniques for using non-volatile random access memory (NVM) as volatile random access memory (RAM) are provided. In one set of embodiments, a computer system can detect that an amount of free space in a volatile RAM of the computer system has become low and, in response, can add one or more memory pages from an unused portion of an NVM of the computer system to the system's volatile RAM pool. Conversely, the computer system can detect that an amount of free space in the NVM has become low and, in response, can return the one or more memory pages from the volatile RAM pool back to the NVM.Type: GrantFiled: August 31, 2017Date of Patent: June 8, 2021Assignee: VMware, Inc.Inventors: Kiran Tati, Preeti Agarwal, Julien Freche, Xavier Deguillard, Rajesh Venkatasubramanian, Ishan Banerjee
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Publication number: 20210026669Abstract: A method of probing a computer system includes steps of compiling a script that includes a call to a first function with first parameters, to generate executable code that includes a call to a second function with second parameters, wherein the second function and the second parameters are specified as values of the first parameters of the first function in the call to the first function, injecting the executable code into an executing module of the computer system, and as the executing module is running, executing the executable code to call the second function.Type: ApplicationFiled: July 24, 2019Publication date: January 28, 2021Inventors: Julien FRECHE, Ashish KAILA, Lorenzo DAVID, Abhishek SRIVASTAVA, Nahim EL ATMANI
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Publication number: 20200241902Abstract: A memory scheduler in a hypervisor allocates physical memory to virtual machines (VMs) based on memory usages metrics generated within the VMs and provided to the hypervisor. More particularly, the memory scheduler determines an allocation target for each VM based on a guest-generated memory usage metric associated with the VM. The allocation target can be increased or decreased from its previous value to reflect changing needs in the VM. Physical memory is allocated when a VM requests it, and is reclaimed during a reclamation process based on its associated allocation target.Type: ApplicationFiled: January 24, 2019Publication date: July 30, 2020Inventors: Julien Freche, Philip Peter Moltmann, Jui-Hao Chiang
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Patent number: 10705954Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device while preserving large pages are provided. In one set of embodiments, a host system can receive a write request with respect to a data block of the NVM region, where the data block is referred to by a snapshot of the NVM region and was originally allocated as part of a large page. The host system can further allocate a new data block in the NVM region, copy contents of the data block to the new data block, and update the data block with write data associated with the write request. The host system can then update a level 1 (L1) page table entry of the NVM region's running point to point to the original data block.Type: GrantFiled: October 29, 2018Date of Patent: July 7, 2020Assignee: VMware, Inc.Inventors: Rajesh Venkatasubramanian, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Xavier Deguillard
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Patent number: 10691591Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using pointer elimination are provided. In one set of embodiments, a host system can, for each level 1 (L1) page table entry of each snapshot of the NVM region, determine whether a data block of the NVM region that is pointed to by the L1 page table entry is a non-active block, and if the data block is a non-active block, remove a pointer to the data block in the L1 page table entry and reduce a reference count parameter associated with the data block by 1. If the reference count parameter has reached zero at this point, the host system purge the data block from the NVM device to the mass storage device.Type: GrantFiled: October 29, 2018Date of Patent: June 23, 2020Assignee: VMware, Inc.Inventors: Kiran Tati, Xavier Deguillard, Ishan Banerjee, Julien Freche, Preeti Agarwal, Rajesh Venkatasubramanian
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Publication number: 20200174936Abstract: The disclosure provides a technique for reducing cache misses to a cache of a computer system. The technique includes deallocating memory pages of the cache from one process and allocating those memory pages to another process based on cache misses of each process during a given time period. Repeating the technique leads the total number of cache misses to the cache to gradually decrease to an optimum or near optimum level. The repetition of the technique leads to a dynamic and flexible apportionment of cache memory pages to processes running within the computer system.Type: ApplicationFiled: December 4, 2018Publication date: June 4, 2020Inventors: Wenguang WANG, Abhishek SRIVASTAVA, Ashish KAILA, Julien FRECHE
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Publication number: 20200133846Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using pointer elimination are provided. In one set of embodiments, a host system can, for each level 1 (L1) page table entry of each snapshot of the NVM region, determine whether a data block of the NVM region that is pointed to by the L1 page table entry is a non-active block, and if the data block is a non-active block, remove a pointer to the data block in the L1 page table entry and reduce a reference count parameter associated with the data block by 1. If the reference count parameter has reached zero at this point, the host system purge the data block from the NVM device to the mass storage device.Type: ApplicationFiled: October 29, 2018Publication date: April 30, 2020Inventors: Kiran Tati, Xavier Deguillard, Ishan Banerjee, Julien Freche, Preeti Agarwal, Rajesh Venkatasubramanian
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Publication number: 20200133842Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using virtblocks are provided. In one set of embodiments, a host system can maintain, in the NVM device, a pointer entry (i.e., virtblock entry) for each allocated data block of the NVM region, where page table entries of the NVM region that refer to the allocated data block include pointers to the pointer entry, and where the pointer entry includes a pointer to the allocated data block. The host system can further determine that a subset of the allocated data blocks of the NVM region are non-active blocks and can purge the non-active blocks from the NVM device to a mass storage device, where the purging comprises updating the pointer entry for each non-active block to point to a storage location of the non-active block on the mass storage device.Type: ApplicationFiled: October 29, 2018Publication date: April 30, 2020Inventors: Xavier Deguillard, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Rajesh Venkatasubramanian
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Publication number: 20200133847Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device while preserving large pages are provided. In one set of embodiments, a host system can receive a write request with respect to a data block of the NVM region, where the data block is referred to by a snapshot of the NVM region and was originally allocated as part of a large page. The host system can further allocate a new data block in the NVM region, copy contents of the data block to the new data block, and update the data block with write data associated with the write request. The host system can then update a level 1 (L1) page table entry of the NVM region's running point to point to the original data block.Type: ApplicationFiled: October 29, 2018Publication date: April 30, 2020Inventors: Rajesh Venkatasubramanian, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Xavier Deguillard
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Patent number: 10496331Abstract: Hierarchical resource tree memory operations can include receiving, at a memory scheduler, an indication of a proposed modification to a value of a memory parameter of an object represented by a node of a hierarchical resource tree, wherein the proposed modification is made by a modifying entity, locking the node of the hierarchical resource tree by the memory scheduler, performing the proposed modification by the memory scheduler, wherein performing the proposed modification includes creating a working value of the memory parameter according to the proposed modification, determining whether the proposed modification violates a structural consistency of the hierarchical resource tree based on the working value, and replacing the value of the memory parameter with the working value of the memory parameter in response to determining that the proposed modification does not violate a structural consistency of the hierarchical resource tree based on the working value, and unlocking the node of the hierarchical resType: GrantFiled: December 4, 2017Date of Patent: December 3, 2019Assignee: VMware, Inc.Inventors: Julien Freche, Kiran Tati, Rajesh Venkatasubramanian