Patents by Inventor Julien Pernot
Julien Pernot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230231073Abstract: A light-emitting diode may include: a first n-doped semiconductor portion; a second p-doped semiconductor portion; an active zone disposed between the first and second portions and including at least one emitting semiconductor portion; a layer that is electrically conductive and optically transparent to at least one wavelength of the UV range configured to be emitted from the emitting portion, the layer being such that the second portion is disposed between the layer and the active zone. The semiconductors of the first portion and of the emitting portion may include compounds including nitrogen atoms as well as atoms of aluminum and/or of gallium. The semiconductor of the second portion may include AlX2Ga(1-X2-Y2)InY2N that is p-doped with magnesium atoms, wherein X2>0, Y2>0, and X2+Y2<1, and in which the atomic concentration of magnesium is greater than 1017 at/cm3. The electrically conductive layer may include doped diamond.Type: ApplicationFiled: October 14, 2020Publication date: July 20, 2023Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, C.N.R.S., UNIVERSITÉ GRENOBLE ALPESInventors: Alexandra-Madalina SILADIE, Bruno DAUDIN, Gwénolé JACOPIN, Julien PERNOT
-
Publication number: 20230215978Abstract: A light-emitting diode is provided, including: a first layer of n-doped AlX1Ga(1-X1-Y1)InY1N, with X1>0 and X1+Y1?1; a second layer of p-doped AlX2Ga(1-X2-Y2)InY2N, with X2>0 and X2+Y2?1; an active area disposed between the first and the second layers and comprising at least one multi-quantum well emissive structure; nanowires based on AlN p-doped with indium and magnesium atoms, disposed on the second layer; and an ohmic contact layer in contact with the nanowires. A method for producing a light-emitting diode is also provided.Type: ApplicationFiled: April 9, 2021Publication date: July 6, 2023Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITE GRENOBLE ALPESInventors: Bruno DAUDIN, Gwenole JACOPIN, Julien PERNOT
-
Publication number: 20230197885Abstract: The invention relates to a method for manufacturing a transmitter device (10) comprising the steps of: providing of a substrate (70) made of a semiconductor material having a first face (85) defining the substrate (70) in a direction (N) normal to the first face (85), implanting, through the first face (85), atoms capable of forming a weakened portion in the substrate, the substrate (70) further comprising a surface portion (92) and an internal portion (95), the weakened portion (90) separating the surface portion (92) from the internal portion (95) in the normal direction (N), forming, on the first face (85), a light-emitting diode (20), bonding a face (150) of the diode (20) to a second face (155) of a support (15), and breaking the weakened portion (90) in order to separate the surface portion (92) from the internal portion (95).Type: ApplicationFiled: April 13, 2021Publication date: June 22, 2023Inventors: Julien PERNOT, Gwenole JACOPIN, Bruno DAUDIN
-
Patent number: 11569381Abstract: The invention relates to a deep depletion MIS transistor (100), comprising: a source region (S) and a drain region (D) made of doped semiconductor diamond of a first conductivity type; a channel region (C) made of doped semiconductor diamond of the first conductivity type, arranged between the source region and the drain region; a drift region (DR) made of doped semiconductor diamond of the first conductivity type, arranged between the channel region and the drain region; and a conductive gate (111) arranged on the channel region and separated from the channel region by a dielectric layer (113).Type: GrantFiled: July 18, 2018Date of Patent: January 31, 2023Assignees: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, INSTITUT POLYTECHNIQUE DE GRENOBLE, UNIVERSITE GRENOBLE ALPESInventors: Julien Pernot, Nicolas Rouger, David Eon, Etienne Gheeraert, Gauthier Chicot, Toan Thanh Pham, Florin Udrea
-
Publication number: 20200235240Abstract: The invention relates to a deep depletion MIS transistor (100), comprising: a source region (S) and a drain region (D) made of doped semiconductor diamond of a first conductivity type; a channel region (C) made of doped semiconductor diamond of the first conductivity type, arranged between the source region and the drain region; a drift region (DR) made of doped semiconductor diamond of the first conductivity type, arranged between the channel region and the drain region; and a conductive gate (111) arranged on the channel region and separated from the channel region by a dielectric layer (113).Type: ApplicationFiled: July 18, 2018Publication date: July 23, 2020Inventors: Julien PERNOT, Nicolas ROUGER, David EON, Etienne GHEERAERT, Gauthier CHICOT, Toan Thanh PHAM, Florin UDREA
-
Patent number: 9337034Abstract: The invention relates to a method for producing a component comprising a conductive grid insulated from a semiconductor monocrystalline diamond substrate by an insulating region, comprising the following steps: a) oxygenating the surface of the substrate so as to replace the hydrogen surface terminations of the substrate with oxygen surface terminations; and b) forming the insulating region on the surface of the substrate by repeated monatomic layer deposition.Type: GrantFiled: December 20, 2012Date of Patent: May 10, 2016Assignees: Centre National de la Recherche Scientifique, Universite Joseph FourierInventors: Gauthier Chicot, Aurélien Marechal, Pierre Muret, Julien Pernot
-
Publication number: 20160071936Abstract: A method for producing a Schottky diode, including the following steps: oxygenating the surface of a semiconductive layer of monocrystalline diamond, in such a way as to replace hydrogen surface terminations of the semiconductive layer with oxygen surface terminations; and forming, by physical vapour deposition, a first conductive layer of zirconium or indium-tin oxide on the surface of the semiconductive layer.Type: ApplicationFiled: April 18, 2014Publication date: March 10, 2016Applicants: Centre National de la Recherche Scientifique, Universite Joseph Fourier, Institut Polytechnique de GrenobleInventors: David Eon, Etienne Gheeraert, Pierre Muret, Julien Pernot, Aboulaye Traore
-
Publication number: 20150014707Abstract: The invention relates to a method for producing a component comprising a conductive grid insulated from a semiconductor monocrystalline diamond substrate by an insulating region, comprising the following steps: a) oxygenating the surface of the substrate so as to replace the hydrogen surface terminations of the substrate with oxygen surface terminations; and b) forming the insulating region on the surface of the substrate by repeated monatomic layer deposition.Type: ApplicationFiled: December 20, 2012Publication date: January 15, 2015Applicant: Universite Joseph FourierInventors: Gauthier Chicot, Aurélien Marechal, Pierre Muret, Julien Pernot
-
Patent number: 6734514Abstract: A metrological Hall effect sensor with sensitivity to temperature less than 250 ppm/° C. and with high Hall effect coefficient for temperatures greater than 200° C. formed in a multilayer structure comprising a thin active layer deposited on a substrate, wherein the substrate is made of monocrystalline silicon carbide (SiC), and wherein the thin active layer is made of a weakly type n-doped silicon carbide (SiC) semiconductor in the exhaustion regime.Type: GrantFiled: February 26, 2003Date of Patent: May 11, 2004Assignee: Centre National de la Recherche-Scientifique - CNRSInventors: Jean-Louis Robert, Julien Pernot, Jean Camassel, Sylvie Contreras
-
Publication number: 20030164530Abstract: A Hall effect sensor formed in a multilayer structure including a thin active layer deposited on a substrate, wherein the substrate is an insulating, semi-insulating or semiconductor material of type p− or n+, respectively, to electrically isolate the active layer of the substrate and wherein the active layer is a weakly doped semiconductor material of type n− or p− in an exhaustion regime.Type: ApplicationFiled: February 26, 2003Publication date: September 4, 2003Applicant: Centre National de la Recherche Scientifique - CNRS, a corporation of FranceInventors: Jean-Louis Robert, Julien Pernot, Jean Camassel, Sylvie Contreras