Abstract: A communication interface comprises an input terminal (Rx) for receiving a logic signal from a remote interface (IF2); a logic level discriminator (12) coupled to the input terminal; a peak detector (14) connected to store the peak value of the signal at the input terminal; and a voltage follower (16) connected to the discriminator for providing an auxiliary supply voltage (Vdd2?) based on the value provided by the peak detector. An electrostatic discharge (ESD) protection device is further provided, including a first diode (D1) and an RC-circuit forming the peak detector, connected in series between the input terminal (Rx) and a first power supply line (Vss1); a transistor (MN1) connected between the first power supply line (Vss1) and the input terminal (Rx) through the first diode (D1) or a second diode (D1?); and inverter (42) configured to turn on the transistor when the voltage across the capacitor of the RC-circuit is less than a threshold.

Abstract: A communication interface comprises an input terminal (Rx) for receiving a logic signal from a remote interface (IF2); a logic level discriminator (12) coupled to the input terminal; a peak detector (14) connected to store the peak value of the signal at the input terminal; and a voltage follower (16) connected to the discriminator for providing an auxiliary supply voltage (Vdd2?) based on the value provided by the peak detector. An electrostatic discharge (ESD) protection device is further provided, including a first diode (D1) and an RC-circuit forming the peak detector, connected in series between the input terminal (Rx) and a first power supply line (Vss1); a transistor (MN1) connected between the first power supply line (Vss1) and the input terminal (Rx) through the first diode (D1) or a second diode (D1?); and inverter (42) configured to turn on the transistor when the voltage across the capacitor of the RC-circuit is less than a threshold.

Abstract: In a general aspect, a method for adjusting an oscillator clock frequency can include applying a first control value to a first oscillator, applying a second control value, different from the first control value, to a second oscillator, measuring a frequency of each of the first and second oscillators, determining, by interpolation, a corrected frequency measurement of the second oscillator depending on a frequency deviation measured between the first and second oscillators when subjected to a third control value, on the third control value, and on the control value applied to the second oscillator, determining by interpolation a new first control value depending on the measured frequency of the first oscillator, on the corrected frequency, on the first and second control values, and on a desired frequency, and applying the new first control value to the first oscillator.

Abstract: In a general aspect, a method for adjusting an oscillator clock frequency can include applying a first control value to a first oscillator, applying a second control value, different from the first control value, to a second oscillator, measuring a frequency of each of the first and second oscillators, determining, by interpolation, a corrected frequency measurement of the second oscillator depending on a frequency deviation measured between the first and second oscillators when subjected to a third control value, on the third control value, and on the control value applied to the second oscillator, determining by interpolation a new first control value depending on the measured frequency of the first oscillator, on the corrected frequency, on the first and second control values, and on a desired frequency, and applying the new first control value to the first oscillator.

Abstract: A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.

Abstract: A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.