Abstract: Systems and methods for cooling an Integrated Circuit (IC) are provided. In one embodiment, the system includes a vessel for holding a coolant in a liquid phase, where the IC is at least in part thermally coupled to the coolant via a heat transfer surface to transfer heat generated by the IC to the coolant. The heat transfer surface has a porous surface exhibiting a gradient of porosity and/or particle size along at least one direction of the heat transfer surface.

Abstract: A micro-electro-mechanical-system (MEMS) device comprises an inertial component configured for being connected to a structure by a flexible connection allowing the inertial component to deform or move relative to the structure in response to an external stimulus applied to the structure. One or more resonant components are connected to the structure or inertial component, the resonant component(s) having resonant mode(s). Transduction unit(s) measures an oscillatory motion of the resonant component relative to the inertial component and/or structure. An electronic control unit applies a pump of electrostatic force to induce an oscillatory motion of the resonant component(s) in the resonant mode, the oscillatory motion being a non-linear function of a strength of the electrostatic force.

Abstract: Systems and methods for cooling an Integrated Circuit (IC) are provided. In one embodiment, the system includes a vessel for holding a coolant in a liquid phase, where the IC is at least in part thermally coupled to the coolant to transfer heat generated by the IC to the coolant. The system also includes a controller for periodically increasing a heat flux supplied by the IC to the coolant followed by a reduction of the heat flux supplied by the IC to the coolant. Methods for controlling the operational parameters of the IC to periodically increasing and then decreasing the heat flux supplied by the IC to the coolant are also provided. A sensor may be used to sense a state of phase change of the coolant and which generates a signal that the controller uses to adjust the heat flux supplied by the IC.

Abstract: Systems and methods for cooling an Integrated Circuit (IC) are provided. In one embodiment, the system includes a vessel for holding a coolant in a liquid phase, where the IC is at least in part thermally coupled to the coolant to transfer heat generated by the IC to the coolant. The system also includes a controller for periodically increasing a heat flux supplied by the IC to the coolant followed by a reduction of the heat flux supplied by the IC to the coolant. Methods for controlling the operational parameters of the IC to periodically increasing and then decreasing the heat flux supplied by the IC to the coolant are also provided. A sensor may be used to sense a state of phase change of the coolant and which generates a signal that the controller uses to adjust the heat flux supplied by the IC.

Abstract: An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

Abstract: An acoustic microscope for scanning a sample, comprising: a pulse transmitter for generating and propagating first acoustic pulses along a propagation direction; a rotatable mirror for deflecting the first acoustic pulses, the rotatable mirror being rotatable about a rotation axis being substantially orthogonal to the propagation direction; an acoustic lens for focusing the deflected first acoustic pulses in the sample and propagating second acoustic pulses reflected by the sample towards the rotatable mirror, the second acoustic pulses being deflected by the rotatable mirror; a pulse detector for detecting the deflected second acoustic pulses; a transmitter controller for controlling the pulse emitter and emitting each one of the first acoustic pulses as a function of a respective angular position of the rotatable mirror; and a mirror controller for rotating the rotatable mirror in order to scan the sample along a scan direction.

Abstract: An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

Abstract: Embodiments of the present invention provide an improved method and structure for flip chip implementation. The interconnections between the electronic circuit (e.g. silicon die) and the circuit board substrate are comprised of a metal alloy that becomes liquid at the operating temperature of the chip. This allows a softer underfill to be used, which in turn reduces stresses during operation and thermal cycling that are caused by the different coefficient of thermal expansion (CTE) of the electronic circuit chip and the circuit board substrate.

Abstract: An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

Abstract: Systems and methods for cooling an Integrated Circuit (IC) are provided. In one embodiment, the system includes a vessel for holding a coolant in a liquid phase, where the IC is at least in part thermally coupled to the coolant to transfer heat generated by the IC to the coolant. The system also includes a controller for periodically increasing a heat flux supplied by the IC to the coolant followed by a reduction of the heat flux supplied by the IC to the coolant. Methods for controlling the operational parameters of the IC to periodically increasing and then decreasing the heat flux supplied by the IC to the coolant are also provided. A sensor may be used to sense a state of phase change of the coolant and which generates a signal that the controller uses to adjust the heat flux supplied by the IC.

Abstract: The present invention relates generally to flip chip technology and more particularly, to a method and structure for reducing internal packaging stresses, improving adhesion properties, and reducing thermal resistance in flip chip packages by using more than one underfill material deposited in different regions of the flip chip interface. According to one embodiment, a method of forming a first underfill in an interior region of an interface such that a periphery region of the interface remains open, and forming a second underfill in the periphery region is disclosed.

Abstract: The present invention relates generally to flip chip technology and more particularly, to a method and structure for reducing internal packaging stresses, improving adhesion properties, and reducing thermal resistance in flip chip packages by using more than one underfill material deposited in different regions of the flip chip interface. According to one embodiment, a method of forming a first underfill in an interior region of an interface such that a periphery region of the interface remains open, and forming a second underfill in the periphery region is disclosed.

Abstract: An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

Abstract: An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate such that the underfill material envelopes both the deformed solder bumps and the substrate pads. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads based on a compression force causing the solder bumps to be deformed against the substrate pads and the semiconductor chip pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

Abstract: The present invention relates generally to flip chip technology and more particularly, to a method and structure for reducing internal packaging stresses, improving adhesion properties, and reducing thermal resistance in flip chip packages by using more than one underfill material deposited in different regions of the flip chip interface. According to one embodiment, a method of forming a first underfill in an interior region of an interface such that a periphery region of the interface remains open, and forming a second underfill in the periphery region is disclosed.

Abstract: The present invention relates generally to flip chip technology and more particularly, to a method and structure for reducing internal packaging stresses, improving adhesion properties, and reducing thermal resistance in flip chip packages by using more than one underfill material deposited in different regions of the flip chip interface. According to one embodiment, a method of forming a first underfill in an interior region of an interface such that a periphery region of the interface remains open, and forming a second underfill in the periphery region is disclosed.

Abstract: A method includes applying solder to conductive pads of a semiconductor device, applying solder to conductive pads of a substrate, aligning the solder on the semiconductor device with the solder on the substrate such that portions of the solder on the semiconductor device contact corresponding portions of the solder on the substrate, heating the semiconductor device and the substrate to liquefy the solder, and exerting an oscillating force operative to oscillate the semiconductor device relative to the substrate at a frequency.

Abstract: An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate such that the underfill material envelopes both the deformed solder bumps and the substrate pads. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads based on a compression force causing the solder bumps to be deformed against the substrate pads and the semiconductor chip pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

Abstract: A method includes applying solder to conductive pads of a semiconductor device, applying solder to conductive pads of a substrate, aligning the solder on the semiconductor device with the solder on the substrate such that portions of the solder on the semiconductor device contact corresponding portions of the solder on the substrate, heating the semiconductor device and the substrate to liquefy the solder, and exerting an oscillating force operative to oscillate the semiconductor device relative to the substrate at a frequency.

Abstract: A method of assembling a semiconductor chip to a substrate wherein at least one of the semiconductor chip and substrate comprise solder bumps. The method includes aligning the semiconductor chip with the substrate; applying a compression force to the semiconductor chip to cause the solder bumps to deform between the semiconductor chip pads and the substrate pads, the compression force being applied while the semiconductor chip and substrate are held at a temperature above room temperature and below a temperature at which any liquid will form in at least one of the solder bumps; then applying an underfill material to fill the gap between the chip and substrate; and then heating the assembled semiconductor chip and substrate to an elevated temperature to cause the solder bumps to melt and reflow and form a metallurgical bond between the semiconductor chip pads and the substrate pads.