Patents by Inventor Jum-gon Kim

Jum-gon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8735281
    Abstract: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: May 27, 2014
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Chang-Woo Shin, Hyun-Soo Chung, Eun-Chul Ahn, Jum-Gon Kim, Jin-Ho Chun
  • Publication number: 20130244419
    Abstract: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.
    Type: Application
    Filed: May 2, 2013
    Publication date: September 19, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Woo SHIN, Hyun-Soo CHUNG, Eun-Chul AHN, Jum-Gon KIM, Jin-Ho CHUN
  • Patent number: 8456012
    Abstract: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: June 4, 2013
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Chang-Woo Shin, Hyun-Soo Chung, Eun-Chul Ahn, Jum-Gon Kim, Jin-Ho Chun
  • Patent number: 7969024
    Abstract: A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: June 28, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-soo Chung, Jae-shin Cho, Seong-deok Hwang, Jum-gon Kim, Ki-hyuk Kim
  • Publication number: 20100078819
    Abstract: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.
    Type: Application
    Filed: September 28, 2009
    Publication date: April 1, 2010
    Inventors: Chang-Woo SHIN, Hyun-Soo Chung, Eun-Chul Ahn, Jum-Gon Kim, Jin-Ho Chun
  • Publication number: 20090315177
    Abstract: A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line.
    Type: Application
    Filed: April 29, 2009
    Publication date: December 24, 2009
    Inventors: Hyun-soo Chung, Jae-shin Cho, Seong-deok Hwang, Jum-gon Kim, Ki-hyuk Kim