Patents by Inventor Jumpei Hashiguchi
Jumpei Hashiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7944712Abstract: A PDP (plasma display panel) is attached to an electrically conductive board with a heat dissipation sheet sandwiched therebetween. A first driving circuit board is fixed on the electrically conductive board by a plurality of electrically conductive supports. On one surface, which faces the electrically conductive board, of the first driving circuit board, one or a plurality of electronic components are mounted, while a second driving circuit board is fixed. A plurality of support terminals of the second driving circuit board are connected to the first driving circuit board, and the first driving circuit board is attached to the electrically conductive board by the electrically conductive supports. Thus, one surface of the second driving circuit board is in contact with the electrically conductive board. One or a plurality of surface mount components are mounted on the other surface of the second driving circuit board that faces the first driving circuit board.Type: GrantFiled: August 8, 2006Date of Patent: May 17, 2011Assignee: Panasonic CorporationInventors: Katsuhisa Kitada, Jumpei Hashiguchi, Nobuyuki Matsui, Etsuo Tsujimoto
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Patent number: 7583240Abstract: In a method of driving a panel, in initializing periods of a plurality of sub-fields constituting one field, one of all-cell initializing operation or selective initializing operation is performed. In the all-cell initializing operation, initializing discharge is performed in all the discharge cells for displaying an image. In the selective initializing operation, initializing discharge is selectively performed only in the discharge cells subjected to sustaining discharge in the sub-field immediately before the sub-filed. According to the average picture level (APL) of the signal of an image to be displayed or the light-emitting rate of a predetermined sub-field, the initializing operation in the initializing period of each sub-field is determined to be one of the all-cell initializing operation and the selective initializing operation.Type: GrantFiled: January 26, 2005Date of Patent: September 1, 2009Assignee: Panasonic CorporationInventors: Takeru Yamashita, Hidehiko Shoji, Jumpei Hashiguchi
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Publication number: 20090179829Abstract: An object of the present invention is to provide a PDP driving circuit and a plasma display apparatus each of which controls a discharge current at the time of sustain discharge by carrying out a switching operation during a power source clamping while changing a turn-on time, so as to display an image whose brightness is suppressed without deteriorating the gray scale. A PDP driving circuit (701) for driving a PDP (10) is constructed by connecting in parallel at least two switching elements (S51, S52) whose turn-on times are different from each other such that the switching elements (S51, S52) can be controlled independently as switches for applying a predetermined potential to scan electrodes and sustain electrodes.Type: ApplicationFiled: August 18, 2006Publication date: July 16, 2009Inventors: Hideki Nakata, Jumpei Hashiguchi
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Publication number: 20090141462Abstract: A PDP (600) is attached to an electrically conductive board (31) with a heat dissipation sheet (60) sandwiched therebetween. A first driving circuit board (32) is fixed on the electrically conductive board (31) by a plurality of electrically conductive supports (34). On one surface, which faces the electrically conductive board (31), of the first driving circuit board (32), one or plurality of electronic components are mounted while a second driving circuit board (40) is fixed. A plurality of support terminals (43b) of the second driving circuit board (40) are connected to the first driving circuit board (32), and the first driving circuit board (32) is attached to the electrically conductive board (31) by the electrically conductive supports (34). Thus, one surface of the second driving circuit board (40) is in contact with the electrically conductive board (31).Type: ApplicationFiled: August 8, 2006Publication date: June 4, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Katsuhisa Kitada, Jumpei Hashiguchi, Nobuyuki Matsui, Etsuo Tsujimoto
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Publication number: 20090015516Abstract: A sub-field lighting rate measuring unit measures a lighting rate in a final sub-field. When the measured lighting rate exceeds a threshold value, a blank signal generator maintains a blank signal at a low level in a sustain time period in a sub-field. An output control circuit brings an output control signal into a low level on the basis of the blank signal. In this case, no data pulse is applied to an address electrode, so that there is no power consumed at the time of the rise and the fall of the data pulse.Type: ApplicationFiled: January 18, 2006Publication date: January 15, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hidehiko Shoji, Yutaka Yoshihama, Jumpei Hashiguchi, Hironari Taniguchi
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Patent number: 7471264Abstract: A reset pulse generating section applies the total of voltages of a positive voltage source and two constant-voltage sources from a high side ramp wave generating section to a high side scan switching device as the upper limit of a reset voltage pulse, and applies the ground potential from a low side ramp wave generating section to a low side scan switching device as the lower limit of the reset voltage pulse. A sustaining pulse generating section applies the upper and lower limits of a sustaining voltage pulse through a common sustaining pulse transmission path to the low side scan switching device.Type: GrantFiled: April 4, 2005Date of Patent: December 30, 2008Assignee: Panasonic CorporationInventors: Manabu Inoue, Satoshi Ikeda, Yasuhiro Arai, Toshikazu Nagaki, Hideki Nakata, Jumpei Hashiguchi, Fumito Kusama
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Patent number: 7375722Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.Type: GrantFiled: July 24, 2003Date of Patent: May 20, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Kigo, Hidehiko Shoji, Jumpei Hashiguchi
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Patent number: 7348937Abstract: Barrier ribs are disposed on a back substrate so as to separate main discharge cells and priming discharge cells, and the top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCp and voltage Vq is applied to even-numbered sustain electrode SUp+1 to cause priming discharge between even-numbered sustain electrode SUp+1 and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1 and voltage Vq is applied to odd-numbered sustain electrode SUp to cause priming discharge between odd-numbered sustain electrode SUp and even-numbered scan electrode SCp+1.Type: GrantFiled: February 23, 2005Date of Patent: March 25, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroyuki Tachibana, Jumpei Hashiguchi, Kenji Ogawa, Toshikazu Wakabayashi, Tomohiro Murakoso
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Patent number: 7345655Abstract: Barrier ribs are disposed on a back substrate so as to separate main discharge cells formed of a display electrode pair and a data electrode which face each other and priming discharge cells formed of a clearance between two adjacent scan electrodes. The top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCp and voltage Vq is applied to even-numbered scan electrode SCp+1 to cause priming discharge between scan electrode SCp+1 and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1 and voltage Vq is applied to odd-numbered scan electrode SCp to cause priming discharge between scan electrode SCp and even-numbered scan electrode SCp+1.Type: GrantFiled: January 13, 2005Date of Patent: March 18, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroyuki Tachibana, Jumpei Hashiguchi, Kenji Ogawa, Toshikazu Wakabayashi, Tomohiro Murakoso
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Patent number: 7142202Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.Type: GrantFiled: July 24, 2003Date of Patent: November 28, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Kigo, Hidehiko Shoji, Jumpei Hashiguchi
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Patent number: 7138988Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.Type: GrantFiled: July 24, 2003Date of Patent: November 21, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Kigo, Hidehiko Shoji, Jumpei Hashiguchi
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Publication number: 20060164338Abstract: Barrier ribs are disposed on a back substrate so as to separate main discharge cells and priming discharge cells, and the top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCp and voltage Vq is applied to even-numbered sustain electrode SUp+1 to cause priming discharge between even-numbered sustain electrode SUp+1 and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1 and voltage Vq is applied to odd-numbered sustain electrode SUp to cause priming discharge between odd-numbered sustain electrode SUp and even-numbered scan electrode SCp+1.Type: ApplicationFiled: February 23, 2005Publication date: July 27, 2006Inventors: Hiroyuki Tachibana, Jumpei Hashiguchi, Kenji Ogawa, Toshikazu Wakabayashi, Tomohiro Murakoso
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Publication number: 20060145997Abstract: Barrier ribs are disposed on a back substrate so as to separate main discharge cells formed of a display electrode pair and a data electrode which face each other and priming discharge cells formed of a clearance between two adjacent scan electrodes. The top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCp and voltage Vq is applied to even-numbered scan electrode SCp+1 to cause priming discharge between scan electrode SCp+1 and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1 and voltage Vq is applied to odd-numbered scan electrode SCp to cause priming discharge between scan electrode SCp and even-numbered scan electrode SCp+1.Type: ApplicationFiled: January 13, 2005Publication date: July 6, 2006Inventors: Hiroyuki Tachibana, Jumpei Hashiguchi, Kenji Ogawa, Toshikazu Wakabayashi, Tomohiro Murakoso
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Patent number: 7050022Abstract: A subfield lighting rate measuring unit detects a lighting rate for each subfield, and a subfield processor controls a scan driver and a sustain driver so that a recovery time of each sustain pulse, a resonance time of LC resonance and a sustain period become longer as the detected lighting rate for each subfield becomes smaller.Type: GrantFiled: September 7, 2001Date of Patent: May 23, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Kigo, Mitsuhiro Kasahara, Mitsuhiro Mori, Jumpéi Hashiguchi
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Patent number: 6987495Abstract: In each of sub-fields on each of lines in a plasma display device, it is judged whether or not all of a plurality of discharge cells on the line or the display cells whose number is not less than a predetermined number do not emit light, and at least one of a voltage applied to a scan electrode and a voltage applied to a sustain electrode on the line are kept at predetermined levels when all of the discharge cells or the discharge cells whose number is not less than the predetermined number do not emit light, or a pulse having the same phase as that of a sustain pulse applied to the sustain electrode 13 is periodically applied in place of a sustain pulse applied to the scan electrode 12 corresponding to the line, to decrease a charge or discharge current as well as to reduce the generation of electromagnetic waves.Type: GrantFiled: November 27, 2002Date of Patent: January 17, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshikazu Wakabayashi, Masanori Nakatsuji, Jumpei Hashiguchi, Kazuo Oohira
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Publication number: 20050285820Abstract: A reset pulse generating section applies the total of voltages of a positive voltage source and two constant-voltage sources from a high side ramp wave generating section to a high side scan switching device as the upper limit of a reset voltage pulse, and applies the ground potential from a low side ramp wave generating section to a low side scan switching device as the lower limit of the reset voltage pulse. A sustaining pulse generating section applies the upper and lower limits of a sustaining voltage pulse through a common sustaining pulse transmission path to the low side scan switching device.Type: ApplicationFiled: April 4, 2005Publication date: December 29, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Manabu Inoue, Satoshi Ikeda, Yasuhiro Arai, Toshikazu Nagaki, Hideki Nakata, Jumpei Hashiguchi, Fumito Kusama
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Publication number: 20040125096Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.Type: ApplicationFiled: July 24, 2003Publication date: July 1, 2004Applicant: Matsushita Electric Industrial Co., LtdInventors: Shigeo Kigo, Hidehiko Shoji, Jumpei Hashiguchi
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Publication number: 20040125095Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.Type: ApplicationFiled: July 24, 2003Publication date: July 1, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Kigo, Hidehiko Shoji, Jumpei Hashiguchi
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Publication number: 20040070577Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.Type: ApplicationFiled: July 24, 2003Publication date: April 15, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Kigo, Hidehiko Shoji, Jumpei Hashiguchi
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Publication number: 20030193449Abstract: In each of sub-fields on each of lines in a plasma display device, it is judged whether or not all of a plurality of discharge cells on the line or the display cells whose number is not less than a predetermined number do not emit light, and at least one of a voltage applied to a scan electrode and a voltage applied to a sustain electrode on the line are kept at predetermined levels when all of the discharge cells or the discharge cells whose number is not less than the predetermined number do not emit light, or a pulse having the same phase as that of a sustain pulse applied to the sustain electrode 13 is periodically applied in place of a sustain pulse applied to the scan electrode 12 corresponding to the line, to decrease a charge or discharge current as well as to reduce the generation of electromagnetic waves.Type: ApplicationFiled: November 27, 2002Publication date: October 16, 2003Applicant: Matsushita Electric Industrial Co., LTD.Inventors: Toshikazu Wakabayashi, Masanori Nakatsuji, Jumpei Hashiguchi, Kazuo Oohira