Abstract: A light emitting module unit includes a circuit board and a light emitting device. The light emitting device includes a plurality of light emitting elements electrically coupled through the circuit board, one or more electrodes arranged on a first surface of the plurality of light emitting elements, a surface barrier formed on a second surface of one or more of the plurality of light emitting elements, and an encapsulation portion disposed above a third surface of the plurality of light emitting elements. The surface barrier is disposed between the encapsulation portion and the second surface of one or more of the plurality of light emitting elements.

Abstract: Anthraquinone-based covalent organic frameworks; methods for preparing anthraquinone-based covalent organic frameworks; solid electrolyte interphases including the anthraquinone-based covalent organic frameworks; and electrochemical devices including the solid electrolyte interphases. The solid electrolyte interphases can exhibit enhanced transport of Li+. Battery cells including the solid electrolyte interphase exhibit improved reversible capacities.

Abstract: A composite solid-state electrolyte, a preparation method thereof and an all-solid-state lithium metal battery. The composite solid-state electrolyte includes a cationic poly(ionic liquid) as a matrix; and an ionic covalent organic framework, TpPa—SO3Li, as a filler. The method for preparing a composite solid-state electrolyte includes combining the poly(ionic liquid) with the ionic covalent organic framework to prepare the composite solid-state electrolyte. The composite solid-state electrolyte can have excellent ionic conductivity up to 1.23×10?3 Scm?1 and Li ion transport number (tLi+) up to 0.82 at room temperature. The composite solid-state electrolyte and the all-solid-state lithium metal battery containing the composite solid-state electrolyte provided by the present invention can achieve long-term safety while achieving high performance, and show great potential in the practical application of all-solid-state lithium metal batteries with high security.

Abstract: The technology and implementations disclosed in this patent document generally relate to a lithium secondary battery including: a first unit cell including a first anode including a 1-1 anode mixture layer and a 1-2 anode mixture layer on the 1-1 anode mixture layer, and a second unit cell including a second anode including a 2-1 anode mixture layer and a 2-2 anode mixture layer on the 2-1 anode mixture layer, wherein a weight ratio of the silicon-based active material in the 1-2 anode mixture layer is greater than a weight ratio of the silicon-based active material in the 1-1 anode mixture layer, and a weight ratio of the silicon-based active material in the 2-2 anode mixture layer is less than or equal to a weight ratio of the silicon-based active material in the 2-1 anode mixture layer.

Abstract: Provided is a control method for a system for determining a lesion obtained via real-time image. The control method comprises: an endoscope device obtaining a stomach endoscopy image; the endoscope device transmitting the obtained stomach endoscopy image to a server; the server determining a lesion included in the stomach endoscopy image, by inputting the stomach endoscopy image into a first artificial intelligence model; when it is determined that a lesion is detected in the stomach endoscopy image, the server obtaining an image including the lesion and transmitting the image to a database of the server; the server determining the type of the lesion included in the image, by inputting the image into a second artificial intelligence model; and when it is determined that a lesion is detected in the stomach endoscopy image, a display device displaying a UI for guiding the location of the lesion in the stomach endoscopy image.

Abstract: A semiconductor package includes a substrate including a first bonding pad and a first conductive pattern positioned at the same level and in contact with the first bonding pad; a lower semiconductor chip and an upper semiconductor chip stacked over the substrate, the lower and upper semiconductor chips respectively including a first lower chip pad and a first upper chip pad; a first lower bonding wire with first and second ends respectively connected to the first bonding pad and the first lower chip pad; and a first upper bonding wire with a first end connected to the first bonding pad and a second end connected to the first upper chip pad, the first end of the first upper bonding wire is located farther from the lower and upper semiconductor chips and closer to the first conductive pattern than the first end of the first lower bonding wire.

Abstract: A battery module including: a battery cell stack in which a plurality of battery cells are stacked; a module frame that houses the battery cell stack; end plates located on first and second surfaces of the battery cell stack; and insertion portions formed on opposite sides of the end plates, the insertion portions being configured to receive ends of moving members configured to be inserted therein.

Abstract: A hybrid indoor positioning system comprises an electronic label provided with an acceleration sensing module, a first direction sensing module, a second direction sensing module and an operational module, the acceleration sensing module generates an acceleration signal, the operational module receives the acceleration signal and generates a movement data, the first direction sensing module and the second direction sensing module respectively generate a first direction signal, a magnetic force information and a second direction signal, the operational module receives the first direction signal and the second direction signal and generates a direction data, the electronic label is provided with a signal receiving module that generates an ambient wireless signal, the movement data and the direction data of the operational module are transmitted to a signal sending module; and a remote server, the remote server has a central processing unit, a signal receiving unit and a judgment model.

Abstract: A semiconductor package includes: a substrate including a first bonding pad and a first conductive pattern positioned at the same level and in contact with the first bonding pad; a lower semiconductor chip and an upper semiconductor chip stacked over the substrate, the lower and upper semiconductor chips respectively including a first lower chip pad and a first upper chip pad; a first lower bonding wire with first and second ends respectively connected to the first bonding pad and the first lower chip pad; and a first upper bonding wire with a first end connected to the first bonding pad and a second end connected to the first upper chip pad, the first end of the first upper bonding wire is located farther from the lower and upper semiconductor chips and closer to the first conductive pattern than the first end of the first lower bonding wire.

Abstract: A battery module according to an exemplary embodiment of the present invention includes: a plurality of cell blocks including a battery cell stack including one or more battery cells each of which includes an electrode lead, and a bus bar cover electrically connected with the electrode leads at an end in a longitudinal direction of the battery cell stack from which the electrode leads protrude and covering the end in the longitudinal direction of the battery cell stack; and an internal bus bar member configured to electrically connect the plurality of cell blocks.

Abstract: A semiconductor package includes a second semiconductor die stacked on a first semiconductor die. The first semiconductor die includes a first contact pad connected to a first integrated circuit, and includes a second contact pad connected to a third contact pad by a first interconnection line. The second semiconductor die includes a fourth contact pad connected to the third contact pad and connected to a second integrated circuit. A first bonding wire is connected to the first contact pad, and a second bonding wire is connected to the second contact pad.

Abstract: A semiconductor package includes: a substrate including a first bonding pad and a first conductive pattern positioned at the same level and in contact with the first bonding pad; a lower semiconductor chip and an upper semiconductor chip stacked over the substrate, the lower and upper semiconductor chips respectively including a first lower chip pad and a first upper chip pad; a first lower bonding wire with first and second ends respectively connected to the first bonding pad and the first lower chip pad; and a first upper bonding wire with a first end connected to the first bonding pad and a second end connected to the first upper chip pad, the first end of the first upper bonding wire is located farther from the lower and upper semiconductor chips and closer to the first conductive pattern than the first end of the first lower bonding wire.

Abstract: The present disclosure relates to a battery module and a battery pack including the same. A battery module according to an embodiment of the present disclosure may includes a battery cell stack in which a plurality of battery cells are stacked, a module frame arranged so as to wrap the battery cell stack, a busbar frame arranged so as to cover the front and rear surfaces of the battery cell stack that is exposed from the module frame, and an end plate arranged so as to cover the busbar frame. The module frame may includes a lower frame for covering the lower part and both side surfaces of the battery cell stack, and an upper plate for covering the upper part of the battery cell stack. At least one assembly guide part may be formed at an edge of the lower frame coupled to the upper plate.

Abstract: A memory package includes a package substrate including power wiring and ground wiring. The memory package also includes a memory controller disposed over an upper surface of the package substrate and electrically connected to the power wiring and the ground wiring. The memory package further includes a memory chip disposed over the memory controller and electrically connected to the power wiring and the ground wiring. The memory package additionally includes a band pass filter disposed at one side of the memory controller over the upper surface of the package substrate and including an inductor and a capacitor which are connected in series. The inductor and the capacitor connected in series are electrically connected between the power wiring and the ground wiring.

Abstract: A memory package includes a package substrate including power wiring and ground wiring. The memory package also includes a memory controller disposed over an upper surface of the package substrate and electrically connected to the power wiring and the ground wiring. The memory package further includes a memory chip disposed over the memory controller and electrically connected to the power wiring and the ground wiring. The memory package additionally includes a band pass filter disposed at one side of the memory controller over the upper surface of the package substrate and including an inductor and a capacitor which are connected in series. The inductor and the capacitor connected in series are electrically connected between the power wiring and the ground wiring.

Abstract: A semiconductor device includes a leakage distribution estimation system.

Abstract: A semiconductor device includes a semiconductor chip body having a surface on which a chip pad is disposed, a passivation layer covering the surface of the semiconductor chip body and providing a tapered hole revealing the chip pad, and a redistributed layer (RDL) structure disposed on the passivation layer. The RDL structure includes a first RDL interconnection portion spaced apart from the tapered hole and passing by the tapered hole and a second RDL overlapping pad portion configured to have a bottom portion contacting the revealed chip pad and configured to have a first side surface facing a side surface of the first RDL interconnection portion. A central portion of the first side surface of the second RDL overlapping pad portion extends toward the side surface of the first RDL interconnection portion such that the first side surface is curved.

Abstract: A semiconductor device includes a semiconductor chip body having a surface on which a chip pad is disposed, a passivation layer covering the surface of the semiconductor chip body and providing a tapered hole revealing the chip pad, and a redistributed layer (RDL) structure disposed on the passivation layer. The RDL structure includes a first RDL interconnection portion spaced apart from the tapered hole and passing by the tapered hole and a second RDL overlapping pad portion configured to have a bottom portion contacting the revealed chip pad and configured to have a first side surface facing a side surface of the first RDL interconnection portion. A central portion of the first side surface of the second RDL overlapping pad portion extends toward the side surface of the first RDL interconnection portion such that the first side surface is curved.

Abstract: Provided are a light source module and a backlight unit (BLU) including the same. The light source module includes a substrate including a base plate extending in a first direction and a pair of dam structures stacked on opposing sides of the base plate along a second direction, orthogonal to the first direction, and extending along the base plate in the first direction, wherein the pair of dam structures are spaced apart from each other along a third direction, orthogonal to the first and second directions. A plurality of light-emitting devices are mounted on the substrate between the pair of dam structures and spaced apart from one another in the first direction. An encapsulation layer covers at least one side surface and a top surface of each of the plurality of light-emitting devices. A height of the pair of dam structures is greater than a height of the encapsulation layer.

Abstract: A light source module according to some example embodiments includes a first substrate and a plurality of second substrates. The first substrate includes a plurality of connectors configured to at least receive a supply of electrical power and a plurality of first connection pads that are configured to be electrically connected to the plurality of connectors. The second substrates each include a plurality of mounting elements on an upper surface and a plurality of second connection pads on a lower surface of the second substrate and configured to be electrically connected to the plurality of mounting elements. Each mounting element may be connected to a separate light-emitting device. A plurality of connection members may electrically connect the first connection pads of the first substrate to the plurality of second connection pads of the plurality of second substrates.