Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

Abstract: An apparatus for recognizing an object includes a camera that obtains a 2D image, a lidar that obtains a 3D image, and a processor. The processor generates a bird's-eye view (BEV) feature map by extracting features from a two-dimensional plane BEV generated based on 3D information. The processor also generates an image feature map by extracting features of a multi-channel 2D image in which the 3D information is added to the 2D image. The processor also generates a complex feature map by mixing the image feature map and the BEV feature map. The processor also recognizes the object by artificial intelligence learning the complex feature map.

Abstract: A seat for a vehicle, includes a second row center seat and a second row side seat provided on a partition wall positioned rearward of a driver seat, the second row center seat may move leftward or rightward, and an interval between the seats may be increased in a state in which the second row center seat is moved in a right direction away from the second row side seat, which makes it possible to maximally prevent body contact between a passenger in the second row center seat and a passenger in the second row side seat.

Abstract: The present disclosure in at least one embodiment provides a wireless communication device, comprising a lower case, an upper radome, coupled to the lower case, creating a storage space between the lower case and the upper radome, an antenna disposed in the storage space, and a plurality of internal substrates, disposed between the antenna and the lower case in the storage space, of which one of the plurality of internal substrates is connected to the antenna, wherein each internal substrate of the plurality of internal substrates is disposed along a first direction parallel to a surface of the lower case facing the plurality of internal substrates.

Abstract: The present disclosure relates to a vehicle rear seat including: a center seat; and side seats located on the left and right of the center seat, wherein, the center seat is capable of protruding by moving the center seat forward with respect to the side seats, and in the state in which the center seat protrudes forward, it is possible to increase an inter-passenger distance so that physical contact between the passenger of the center seat and the passenger of each of the side seats can be prevented as much as possible.

Abstract: A quasi-coaxial transmission line, a semiconductor package including the same and a method of manufacturing the same are disclosed. The quasi-coaxial transmission line includes a core, which is formed through an upper surface and a lower surface of a base substrate so as to transmit an electrical signal, and a shield, which is spaced apart from the core and which coaxially surrounds a side surface of the core, at least a portion of the shield being removed so as to form an open portion. The quasi-coaxial transmission line is capable of preventing distortion of an electrical signal at a portion thereof that is connected to an external circuit board and to reduce an area of a semiconductor package including the quasi-coaxial transmission line.

Abstract: A semiconductor package includes a semiconductor chip including an electrode pad formed on the top surface thereof, a passive device embedded in the semiconductor package, the passive device having no functional electrode on the top surface thereof, a cover layer covering the semiconductor chip and the passive device, and at least one electrode pattern formed on the cover layer to transmit electrical signals. The cover layer includes at least one first opening formed to expose a region in which the functional electrode is to be formed. The electrode pattern includes a functional electrode portion formed in a region in which the functional electrode of the passive device is to be formed through the first opening. In the process of forming the electrode pattern, a functional electrode of the passive device is formed together therewith, thereby eliminating a separate step of manufacturing a functional electrode and thus reducing manufacturing costs.

Abstract: The present invention provides a method for manufacturing a high frequency capacitor, including preparing a substrate for formation of the capacitor, forming a dielectric layer at an upper surface of the substrate, forming an upper electrode at an upper surface of the dielectric layer, and removing a portion of a lower surface of the substrate, to expose a lower surface of the dielectric layer, and forming a lower electrode at the lower surface of the dielectric layer. The high frequency capacitor includes a dielectric layer having a uniform surface, a thick upper electrode, and a thick lower electrode and, as such, exhibits high quality factor (Q) even at a high frequency.

Abstract: An embodiment of the present invention provides a capacitor having a through hole structure and a manufacturing method therefor. The capacitor having the through hole structure includes: a baseboard having a through hole penetrating from an upper surface of the baseboard to a lower surface thereof; a first conductive layer formed on an internal surface of the through hole, and the upper surface of the baseboard, the lower surface thereof, or both the upper and lower surfaces thereof; a first dielectric layer formed on the first conductive layer; and a second conductive layer formed on the first dielectric layer.

Abstract: A quasi-coaxial transmission line, a semiconductor package including the same and a method of manufacturing the same are disclosed. The quasi-coaxial transmission line includes a core, which is formed through an upper surface and a lower surface of a base substrate so as to transmit an electrical signal, and a shield, which is spaced apart from the core and which coaxially surrounds a side surface of the core, at least a portion of the shield being removed so as to form an open portion. The quasi-coaxial transmission line is capable of preventing distortion of an electrical signal at a portion thereof that is connected to an external circuit board and to reduce an area of a semiconductor package including the quasi-coaxial transmission line.

Abstract: A semiconductor package includes a semiconductor chip including an electrode pad formed on the top surface thereof, a passive device embedded in the semiconductor package, the passive device having no functional electrode on the top surface thereof, a cover layer covering the semiconductor chip and the passive device, and at least one electrode pattern formed on the cover layer to transmit electrical signals. The cover layer includes at least one first opening formed to expose a region in which the functional electrode is to be formed. The electrode pattern includes a functional electrode portion formed in a region in which the functional electrode of the passive device is to be formed through the first opening. In the process of forming the electrode pattern, a functional electrode of the passive device is formed together therewith, thereby eliminating a separate step of manufacturing a functional electrode and thus reducing manufacturing costs.

Abstract: An embodiment of the present invention provides a capacitor having a through hole structure and a manufacturing method therefor. The capacitor having the through hole structure includes: a baseboard having a through hole penetrating from an upper surface of the baseboard to a lower surface thereof; a first conductive layer formed on an internal surface of the through hole, and the upper surface of the baseboard, the lower surface thereof, or both the upper and lower surfaces thereof; a first dielectric layer formed on the first conductive layer; and a second conductive layer formed on the first dielectric layer.

Abstract: Disclosed is a semiconductor package. The semiconductor package includes a semiconductor chip on which an electrode pad is disposed, at least one input/output segment disposed around a side surface of the semiconductor chip to be spaced apart from the semiconductor chip and transmitting an electric signal, and an insulating layer filled between the semiconductor chip and the input/output segment. The insulating layer is provided on the semiconductor chip and the input/output segment to fix and insulate the semiconductor chip and the input/output segment from each other. The semiconductor further includes an electrode pattern provided on the insulating layer and configured to electrically connect the electrode pad of the semiconductor chip and the input/output segment.

Abstract: A method of inspecting a semiconductor device including setting a target place on a wafer, the target place including a deep trench, forming a first cut surface by performing first milling on the target place in a first direction, obtaining first image data of the first cut surface, forming a second cut surface by performing second milling on the target place in a second direction opposite to the first direction, obtaining second image data of the second cut surface, obtaining a plurality of first critical dimension (CD) values for the deep trench from the first image data, obtaining a plurality of second CD values for the deep trench from the second image data, analyzing a degree of bending of the deep trench based on the first CD values and the second CD values, and providing the semiconductor device meeting a condition based on results of the analyzing may be provided.

Abstract: The present invention provides a semiconductor package and a manufacturing method thereof, the semiconductor package including: at least one semiconductor chip; a molding layer surrounding the semiconductor chip; a redistribution layer provided on a first surface of the molding layer to transmit an electrical signal; and at least one connecting element transmitting an electrical signal from the first surface of the molding layer to a second surface of the molding layer. According to the present invention, since the connecting element, which is an independent element capable of transmitting an electrical signal in a vertical direction of the semiconductor package, is included in the molding layer, it is possible to integrate an electric element such as an antenna into a rear surface space of the semiconductor package.

Abstract: A method of inspecting a semiconductor device including setting a target place on a wafer, the target place including a deep trench, forming a first cut surface by performing first milling on the target place in a first direction, obtaining first image data of the first cut surface, forming a second cut surface by performing second milling on the target place in a second direction opposite to the first direction, obtaining second image data of the second cut surface, obtaining a plurality of first critical dimension (CD) values for the deep trench from the first image data, obtaining a plurality of second CD values for the deep trench from the second image data, analyzing a degree of bending of the deep trench based on the first CD values and the second CD values, and providing the semiconductor device meeting a condition based on results of the analyzing may be provided.

Abstract: In one embodiment of the present invention, there is provided an MIS capacitor, including: a lower electrode formed with a semiconductor substrate having electrical conductivity and through which an electrical signal passes at a lower surface thereof; an insulating layer formed on the lower electrode; an upper electrode formed on the insulating layer and through which the electrical signal passes at an upper surface thereof; and a first conductive layer formed on side surfaces of the lower electrode so that the electrical signal passing the lower surface and an upper surface of the lower electrode passes along the side surfaces of the lower electrode, wherein the first conductive layer has electro conductivity higher than the electro conductivity of the lower electrode.

Abstract: In one embodiment of the present invention, there is provided an MIS capacitor, including: a lower electrode formed with a semiconductor substrate having electrical conductivity and through which an electrical signal passes at a lower surface thereof; an insulating layer formed on the lower electrode; an upper electrode formed on the insulating layer and through which the electrical signal passes at an upper surface thereof; and a first conductive layer formed on side surfaces of the lower electrode so that the electrical signal passing the lower surface and an upper surface of the lower electrode passes along the side surfaces of the lower electrode, wherein the first conductive layer has electro conductivity higher than the electro conductivity of the lower electrode.

Abstract: Disclosed is a semiconductor package including: a base substrate provided with at least one cavity and made of a metallic material; at least one semiconductor chip mounted in the cavity; and a heat dissipating member arranged in a gap between an inner surface of the cavity and the semiconductor chip.

Abstract: A method for forming a wiring for a semiconductor device according to an aspect of the present invention includes: forming a predetermined pattern on a first surface of a silicon substrate by selectively etching the first surface; coating, with a metal layer, a selected area of the first surface, including an area whereat the predetermined pattern is formed; forming organic material in the first surface to fill an etched portion and cover the coated metal layer; forming a plurality of via holes in the organic material and connecting the metal wiring to the coated metal layer through the via holes; and grinding a second surface corresponding to the first surface to remove a part of the metal layer formed in the etched portion.