Abstract: Systems, computer-implemented methods, and computer program products to facilitate batched quantum circuits simulation on a graphics processing unit are provided. According to an embodiment, a system can comprise a first processor that executes computer executable components stored in memory. The computer executable components can comprise a generalization component that generates a first defined matrix representation of a qubit gate and that employs a control mask to generate a second defined matrix representation of a multi-qubit gate. The computer executable components can further comprise an execution component that executes a kernel overhead operation using the first defined matrix representation and the second defined matrix representation to generate a batched kernel.

Abstract: A method, system and computer program product for reducing the number of shots required to perform a noisy circuit simulation. A noise model, such as the Pauli noise model or the Kraus noise model, is applied to each shot of the quantum circuit, where the noise model randomly selects a gate operation to be performed in simulating the quantum circuit. A subset of shots are identified (e.g., shot numbers 1 and 3), where each of the selected subset of shots has the same gate operation(s) selected by the noise model to be performed in simulating the quantum circuit. A single simulation of the quantum circuit will then be performed for such a subset of shots using the selected gate operation (e.g., Pauli Z gate) for such a group of shots. In this manner, the number of shots required to perform a noisy circuit simulation is reduced.

Abstract: Techniques for circuit serialization for parameterized-circuit simulation are described. In one example, a system is provided that comprises a processor that executes computer executable components stored in memory. The computer executable components comprise a determination component that determines a first path of computational nodes and a second path of computational nodes of a parameter tree comprising a plurality of computational nodes, wherein the first path of computational nodes and the second path of computational nodes share one or more computational nodes at the beginning of the first path of computational nodes and the second path of computational nodes. The computer executable components further comprise a serialization component that creates a serialized path of computational nodes from the first path of computational nodes and the second path of computational nodes.

Abstract: Systems, computer-implemented methods, and computer program products to facilitate batched quantum circuits simulation on a graphics processing unit are provided. According to an embodiment, a system can comprise a first processor that executes computer executable components stored in memory. The computer executable components can comprise a generalization component that generates a first defined matrix representation of a qubit gate and that employs a control mask to generate a second defined matrix representation of a multi-qubit gate. The computer executable components can further comprise an execution component that executes a kernel overhead operation using the first defined matrix representation and the second defined matrix representation to generate a batched kernel.

Abstract: A computer-implemented method performed by one or more computing nodes for simulating a gate operation of quantum computing is disclosed. In the method, a problem having 2n size is divided into a plurality of sub-problems, each of which has 2m size. A first index table for storing a first identifier is prepared for each sub-problem. In response to a request for a gate operation involving exchanges of quantum amplitudes that are designated by a target qubit at least in part, a determination is made as to whether a first condition regarding at least the target qubit and m is satisfied or not. In response to the first condition being satisfied, corresponding first identifiers in the first index table are swapped in place of the exchanges of the quantum amplitudes.

Abstract: Techniques for simulating a quantum circuit based on fusion of at least a portion of a measure gate is provided. Data representing a quantum circuit comprising a quantum gate and a measure gate is received. The measure gate in the quantum circuit is divided into one or more virtual gates and at least one of the one or more virtual gates is fused with the quantum gate. The gate fusion combines the operations of the fused gates and cache blocking to more efficiently simulate the quantum circuit. In one embodiment, the simulation of the quantum circuit is executed locally on a computing device. Alternatively, the simulation of the quantum circuit is performed remotely over a network via an application program interface (“API”) and results of the simulation are reported via the API.

Abstract: An inspecting instrument to be used for measuring, using a test substance-containing solution containing a test substance and a liquid, which is contained in the test substance-containing liquid. The inspecting instrument includes a wall that has a periodic structure resulting from a plurality of recesses or protrusions, the plurality of recesses or the plurality of protrusions including a refractive index adjusting layer on surfaces thereof, the refractive index adjusting layer being a layer having a refractive index greater than a refractive index of the test substance-containing solution or being a silicon layer. A method of measuring the concentration of a test substance in a liquid, measured using the inspecting instrument, has high accuracy.

Abstract: A computer-implemented method, computer program product, and apparatus are provided. The method includes substituting N×N first integer elements, among a plurality of first integer elements obtained by dividing first integer data expressing a first integer in a first digit direction, into a first matrix having N rows and N columns. The method further includes substituting each of one or more second integer elements, among a plurality of second integer elements obtained by dividing second integer data expressing a second integer in a second digit direction, into at least one matrix element of a second matrix having N rows and N columns. The method also includes calculating a third matrix that is a product of the first matrix and the second matrix. The method includes outputting each matrix element of the third matrix as a partial product in a calculation of a product of the first integer and the second integer.

Abstract: A method is provided for reducing consumption of a memory in a propagation process for a neural network (NN) having fixed structures for computation order and node data dependency. The memory includes memory segments for allocating to nodes. The method collects, in a NN training iteration, information for each node relating to an allocation, size, and lifetime thereof. The method chooses, responsive to the information, a first node having a maximum memory size relative to remaining nodes, and a second node non-overlapped with the first node lifetime. The method chooses another node non-overlapped with the first node lifetime, responsive to a sum of memory sizes of the second node and the other node not exceeding a first node memory size. The method reallocates a memory segment allocated to the first node to the second node and the other node to be reused by the second node and the other node.

Abstract: A computer-implemented method is provided for hiding overheads on a parallel computing platform. The computer-implemented method includes loading a first kernel overhead and a second kernel overhead in a queue of a second thread, and loading a dummy kernel overhead between the first and second kernel overheads in the queue of second thread. The computer-implemented method further includes loading a waiting process in the queue of a first thread, the waiting process remaining active until a previous kernel of the first and second kernel overheads ends. The computer-implemented method furthers include allocating memory copy overheads related to the previous kernel in the queue of the first thread and allocating a stop process in the queue of the first thread, the stop process configured to stop a dummy kernel, the dummy kernel related to the dummy kernel overhead.

Abstract: A computer-implemented method performed by one or more computing nodes for simulating a gate operation of quantum computing is disclosed. In the method, a problem having 2n size is divided into a plurality of sub-problems, each of which has 2m size. A first index table for storing a first identifier is prepared for each sub-problem. In response to a request for a gate operation involving exchanges of quantum amplitudes that are designated by a target qubit at least in part, a determination is made as to whether a first condition regarding at least the target qubit and m is satisfied or not. In response to the first condition being satisfied, corresponding first identifiers in the first index table are swapped in place of the exchanges of the quantum amplitudes.

Abstract: Techniques for simulating a quantum circuit based on fusion of at least a portion of a measure gate is provided. Data representing a quantum circuit comprising a quantum gate and a measure gate is received. The measure gate in the quantum circuit is divided into one or more virtual gates and at least one of the one or more virtual gates is fused with the quantum gate. The gate fusion combines the operations of the fused gates and cache blocking to more efficiently simulate the quantum circuit. In one embodiment, the simulation of the quantum circuit is executed locally on a computing device. Alternatively, the simulation of the quantum circuit is performed remotely over a network via an application program interface (“API”) and results of the simulation are reported via the API.

Abstract: A computer-implemented method for offloading a problem having 2n size from processing circuitry to one or more accelerators is disclosed. The processing circuitry and the one or more accelerators include respective memories. In the method, a problem having 2n size is divided into a plurality of units each having 2u size. At least a part of the units is allocated to the one or more accelerators. A determination is made as to whether there is a remaining part of the units to be allocated onto the processing circuitry. A temporary buffer is prepared on each memory of at least the one or more accelerators. The temporary buffer is used for storing a copy of a dependent unit stored on a different memory, during inter-unit calculation.

Abstract: A computer-implemented method, computer program product, and apparatus are provided. The method includes substituting N×N first integer elements, among a plurality of first integer elements obtained by dividing first integer data expressing a first integer in a first digit direction, into a first matrix having N rows and N columns. The method further includes substituting each of one or more second integer elements, among a plurality of second integer elements obtained by dividing second integer data expressing a second integer in a second digit direction, into at least one matrix element of a second matrix having N rows and N columns. The method also includes calculating a third matrix that is a product of the first matrix and the second matrix. The method includes outputting each matrix element of the third matrix as a partial product in a calculation of a product of the first integer and the second integer.

Abstract: A computer-implemented method, system, and computer program product are provided to simulate a target system. The method includes determining system performance metrics for a target system and an execution system. The method also includes generating a ratio of estimation between the system performance metrics for the target system and the execution system. The method additionally includes throttling components in the execution system to adjust all of the system performance metrics of the execution system responsive to the ratio of estimation to create a throttled execution system. The method further includes measuring a throttled execution time while running an application on the throttled execution system. The method also includes estimating a target execution time for the application on the target system responsive to the throttled execution time.

Abstract: A computer-implemented method, computer program product, and apparatus are provided. The method includes substituting N×N first integer elements, among a plurality of first integer elements obtained by dividing first integer data expressing a first integer in a first digit direction, into a first matrix having N rows and N columns. The method further includes substituting each of one or more second integer elements, among a plurality of second integer elements obtained by dividing second integer data expressing a second integer in a second digit direction, into at least one matrix element of a second matrix having N rows and N columns. The method also includes calculating a third matrix that is a product of the first matrix and the second matrix. The method includes outputting each matrix element of the third matrix as a partial product in a calculation of a product of the first integer and the second integer.

Abstract: A computer-implemented method is provided for estimating the performance of a GPU application on a new computing machine having an increased GPU-link performance ratio relative to a current computing machine having a current GPU-link performance ratio. The method includes adding a delay to CPU-GPU communication on the current computing machine to simulate a delayed-communication environment on the current computing machine. The method further includes executing the target GPU application in the delayed-communication environment. The method also includes measuring the performance of the target GPU application in the delayed-communication environment. The method additionally includes estimating the performance of the new computing machine having the increased higher GPU-link performance ratio, based on the measured performance of the target GPU application in the delayed-communication environment.

Abstract: A computer-implemented method is provided for estimating the performance of a GPU application on a new computing machine having an increased GPU-link performance ratio relative to a current computing machine having a current GPU-link performance ratio. The method includes adding a delay to CPU-GPU communication on the current computing machine to simulate a delayed-communication environment on the current computing machine. The method further includes executing the target GPU application in the delayed-communication environment. The method also includes measuring the performance of the target GPU application in the delayed-communication environment. The method additionally includes estimating the performance of the new computing machine having the increased higher GPU-link performance ratio, based on the measured performance of the target GPU application in the delayed-communication environment.

Abstract: A method is provided for reducing consumption of a memory in a propagation process for a neural network (NN) having fixed structures for computation order and node data dependency. The memory includes memory segments for allocating to nodes. The method collects, in a NN training iteration, information for each node relating to an allocation, size, and lifetime thereof. The method chooses, responsive to the information, a first node having a maximum memory size relative to remaining nodes, and a second node non-overlapped with the first node lifetime. The method chooses another node non-overlapped with the first node lifetime, responsive to a sum of memory sizes of the second node and the other node not exceeding a first node memory size. The method reallocates a memory segment allocated to the first node to the second node and the other node to be reused by the second node and the other node.

Abstract: A computer-implemented method, computer program product, and apparatus are provided. The method includes substituting N×N first integer elements, among a plurality of first integer elements obtained by dividing first integer data expressing a first integer in a first digit direction, into a first matrix having N rows and N columns. The method further includes substituting each of one or more second integer elements, among a plurality of second integer elements obtained by dividing second integer data expressing a second integer in a second digit direction, into at least one matrix element of a second matrix having N rows and N columns. The method also includes calculating a third matrix that is a product of the first matrix and the second matrix. The method includes outputting each matrix element of the third matrix as a partial product in a calculation of a product of the first integer and the second integer.