Patents by Inventor Jun-Dong Kim

Jun-Dong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6468920
    Abstract: A method for manufacturing a contact hole in a semiconductor device which includes the steps of preparing an active matrix provided with a substrate and word lines formed on the substrate, forming an etching barrier layer on the word lines and the substrate, forming an interlayer insulating layer on the etching barrier layer, forming a photoresist pattern on the interlayer insulating layer for defining a contact hole, etching the interlayer insulating layer under conditions of low polymerization until the etching barrier layer on the word lines is exposed, etching the interlayer insulating layer under conditions of high polymerization, and etching the interlayer insulating layer under conditions of low polymerization until the etching barrier layer in a bottom of the contact hole is exposed.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: October 22, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Sung-Chan Park, Jun-Dong Kim
  • Publication number: 20010006850
    Abstract: A method for manufacturing a contact hole in a semiconductor device which includes the steps of preparing an active matrix provided with a substrate and word lines formed on the substrate, forming an etching barrier layer on the word lines and the substrate, forming an interlayer insulating layer on the etching barrier layer, forming a photoresist pattern on the interlayer insulating layer for defining a contact hole, etching the interlayer insulating layer under conditions of low polymerization until the etching barrier layer on the word lines is exposed, etching the interlayer insulating layer under conditions of high polymerization, and etching the interlayer insulating layer under conditions of low polymerization until the etching barrier layer in a bottom of the contact hole is exposed.
    Type: Application
    Filed: December 26, 2000
    Publication date: July 5, 2001
    Inventors: Sung-Chan Park, Jun-Dong Kim
  • Publication number: 20010005622
    Abstract: A method for manufacturing a gate electrode, the method including the steps of forming upon a semiconductor substrate a polysilicon layer, a metal nitride layer, a tungsten layer and a photoresist layer, patterning the photoresist layer on the tungsten layer into a predetermined configuration, etching the tungsten layer, the metal nitride layer, a portion of the polysilicon layer into the predetermined configuration by using a mixed etchant of fluorine and chlorine species etchant, and patterning the remaining polysilicon layer into the predetermined configuration by using chlorine etchant.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 28, 2001
    Inventors: Jun-Dong Kim, Young-Hun Bae, Tae-Woo Jung, Dong-Duk Lee
  • Patent number: 5290372
    Abstract: A vibration damping alloy has a mixed structure of martensite and austenite. The alloy steel is iron-based to which 14-22% by weight of manganese is added. The vibration damping alloy is manufactured by mixing electrolytic iron and manganese in a molten state. The molten mixture, containing 14-22% of manganese with the remainder of iron, is cast as an ingot. The ingot is homogenized at 1000.degree.-1300.degree. C. for 20-40 hours and then hot rolled at 900.degree.-1100.degree. C. for 20 minutes to 90 minutes. The ingot is cooled with air or water.
    Type: Grant
    Filed: October 19, 1992
    Date of Patent: March 1, 1994
    Assignee: Woojin Osk Corporation
    Inventors: Jong-Sul Choi, Seung-Han Baek, Jun-Dong Kim