Patents by Inventor Jun Eto

Jun Eto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190046917
    Abstract: Disclosed is a purification method for removing a metal component from a fluorine compound gas containing hydrogen fluoride and a metal component. This method includes a removing step for removing the hydrogen fluoride and the metal component therefrom by bringing the fluorine compound gas into contact with a solid metal fluoride to adsorb the hydrogen fluoride and the metal component on the metal fluoride. It is preferable for the fluorine compound gas to contain at least one kind selected from the group consisting of CIF, CIF3, IF5, IF7, BrF3, BrF5, NF3, WF6, SiF4, CF4, SF6 and BF3. It is also preferable for the metal fluoride to be an alkali metal fluoride or an alkali earth metal fluoride. Surprisingly, the presence of hydrogen fluoride in a fluorine compound gas makes it possible to remove a metal component therefrom as an impurity as a result of adsorption thereof by a metal fluoride.
    Type: Application
    Filed: January 27, 2017
    Publication date: February 14, 2019
    Applicant: Central Glass Company, Limited
    Inventors: Akifumi YAO, Kohei OOYA, Yuta TAKEDA, Jun ETO
  • Publication number: 20170305044
    Abstract: The bonding apparatus of the present invention is an apparatus that bonds a patch containing a reinforcing fiber to a bonded section of a corner section CR of an object member. The bonding apparatus has s heater mat, a pushing member, a bag member having a decompression port, a mold releasing film, a breather, a heater mat and a sealant. A pushing member has a first cowl plate, a second cowl plate and an elastic pressuring body. A pressuring section of the pushing member has the surface shape corresponding to a corner section design value after the patch is bonded. By protruding from a gap between a first cowl plate and a second cowl plate to a direction of the corner section CR, the patch is pushed to the bonded section and the generation of a wrinkle in the reinforcing fiber can be prevented.
    Type: Application
    Filed: November 25, 2015
    Publication date: October 26, 2017
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Akihiro TERASAKA, Jun ETO, Yasunobu ISHIDA
  • Patent number: 9269173
    Abstract: An information processing apparatus includes: a resistance value acquiring unit that acquires a resistance value of at least one component corresponding to a physical quantity that is transmitted between two components, using inter-component information having component identifiers respectively indicating two components; a display information generating unit that generates, using the inter-component information, display information for displaying a transmission path diagram, which is an image showing a transmission path having nodes respectively associated with at least two components, and is an image in which information indicating the resistance value acquired by the resistance value acquiring unit is arranged at a node associated with at least one component from which the resistance value has been acquired; and an output unit that outputs the display information generated by the display information generating unit.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: February 23, 2016
    Assignee: SOFTWARE CRADLE CO., LTD.
    Inventor: Jun Eto
  • Publication number: 20150116332
    Abstract: An information processing apparatus includes: a resistance value acquiring unit that acquires a resistance value of at least one component corresponding to a physical quantity that is transmitted between two components, using inter-component information having component identifiers respectively indicating two components; a display information generating unit that generates, using the inter-component information, display information for displaying a transmission path diagram, which is an image showing a transmission path having nodes respectively associated with at least two components, and is an image in which information indicating the resistance value acquired by the resistance value acquiring unit is arranged at a node associated with at least one component from which the resistance value has been acquired; and an output unit that outputs the display information generated by the display information generating unit.
    Type: Application
    Filed: October 10, 2014
    Publication date: April 30, 2015
    Applicant: SOFTWARE CRADLE CO., LTD.
    Inventor: Jun ETO
  • Patent number: 8695671
    Abstract: A prepreg lamination head and a prepreg automatic lamination apparatus with the same is provided. By using them, the curling-up of the cut terminal portion of the prepreg sheet can be prevented. The prepreg lamination head includes: a first roller, a second roller, and a forward-placed paper liner peeling device. The forward-placed paper liner peeling device includes a third roller, which is provided between and above the first and second rollers. The paper liner attached on the first side of the prepreg sheet is peeled off right after passing the first roller. The peeled paper liner is hanged over the third roller between the first and second rollers. The third roller guides the peeled paper liner to the second roller. The prepreg sheet is pressed on the laminated body with the second roller through the paper liner.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: April 15, 2014
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Daiki Arakawa, Jun Eto, Koji Yamada, Masayuki Kokubu
  • Publication number: 20120298309
    Abstract: A prepreg lamination head which laminates a prepreg sheet (8) toward a fiber direction (T2) in a direction intersecting a length direction (T1) of a prepreg laminated body is disposed at each of both outsides oldie subject laminated body (W) in the width direction. The prepreg lamination head includes: a pair of guide rollers which guides a prepreg sheet (8) so as to be superimposed on the subject laminated body (W); and a lamination shoe (31) which is disposed between the pair of guide rollers so as to freely advance and retract in the fiber direction (T2) and stick the prepreg sheet (8) guided between the pair of guide rollers on the subject laminated body (W) by pressing the prepreg sheet from one surface thereof. Then, the lamination shoe (31) is divided in the width direction of the prepreg sheet (8).
    Type: Application
    Filed: February 25, 2011
    Publication date: November 29, 2012
    Inventors: Daiki Arakawa, Koji Yamada, Jun Eto, Masayuki Kokubu
  • Publication number: 20120227907
    Abstract: A prepreg lamination head and a prepreg automatic lamination apparatus with the same is provided. By using them, the curling-up of the cut terminal portion of the prepreg sheet can be prevented. The prepreg lamination head includes: a first roller, a second roller, and a forward-placed paper liner peeling device. The forward-placed paper liner peeling device includes a third roller, which is provided between and above the first and second rollers. The paper liner attached on the first side of the prepreg sheet is peeled off right after passing the first roller. The peeled paper liner is hanged over the third roller between the first and second rollers. The third roller guides the peeled paper liner to the second roller. The prepreg sheet is pressed on the laminated body with the second roller through the paper liner.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 13, 2012
    Applicant: Mitsubishi Heavy Industries, Ltd
    Inventors: Daiki Arakawa, Jun Eto, Koji Yamada, Masayuki Kokubu
  • Patent number: 8265799
    Abstract: A first reception unit receives “ambient temperature” which is a temperature of surroundings where the computer is installed. A second reception unit receives “first device temperature” which is a temperature of a first device provided in the computer. A third reception unit receives “second device temperature” which is a temperature of a second device provided in the computer. A fan rotation speed indicating unit determines the rotation speed of the fan based on a comparison between the ambient temperature, first device temperature, and second device temperature which are received by the first to third reception units and a fan rotation speed description table describing a relationship between the respective temperature and fan rotation speed and instructs the fan to rotate at the determined rotation speed.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: September 11, 2012
    Assignee: NEC Computertechno, Ltd.
    Inventor: Jun Eto
  • Publication number: 20100228403
    Abstract: A first reception unit receives “ambient temperature” which is a temperature of surroundings where the computer is installed. A second reception unit receives “first device temperature” which is a temperature of a first device provided in the computer. A third reception unit receives “second device temperature” which is a temperature of a second device provided in the computer. A fan rotation speed indicating unit determines the rotation speed of the fan based on a comparison between the ambient temperature, first device temperature, and second device temperature which are received by the first to third reception units and a fan rotation speed description table describing a relationship between the respective temperature and fan rotation speed and instructs the fan to rotate at the determined rotation speed.
    Type: Application
    Filed: March 4, 2010
    Publication date: September 9, 2010
    Inventor: JUN ETO
  • Publication number: 20080303466
    Abstract: A fan system includes a fan attached to a housing; and a DC motor configured to drive the fan. A fan control apparatus includes a control unit configured to control a rotation speed of the fan so as to periodically change around a specific rotation speed based on data corresponding to a specific rotation speed.
    Type: Application
    Filed: March 26, 2008
    Publication date: December 11, 2008
    Inventor: JUN ETO
  • Publication number: 20070222473
    Abstract: A multilayer printed wiring board having a compact test coupon formed on each of the signal wiring layers is provided, and accurate and efficient method of characteristic impedance measurement for each signal wiring layer is realized. The test coupon is constituted by a plurality of linear parts extending parallel to each other and folded-back parts mutually connecting the linear parts. A through hole is provided for serially connecting the respective test coupons of the signal wiring layers adjoining each other. Two measuring pads, one is connected to one end of the serially connected test coupons and another is connected to the ground layer, are also provided. The measurement is performed by applying a step pulse between two measuring pads and measuring voltages of reflection waves from the serially connected test coupons.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 27, 2007
    Applicant: NEC CORPORATION
    Inventor: Jun Eto
  • Patent number: 6512398
    Abstract: The reliability of a semiconductor integrated circuit device is remarkably improved by minimizing the fluctuations of the detection level of the supply voltage due to the manufacturing process and/or other factors. In the semiconductor integrated circuit device according to the invention, a differential amplifier circuit SA amplifies the differential voltage representing the difference between the reference voltage VREF generated by a reference voltage generating section 16 and the detection voltage obtained by dividing a supply voltage VCC by means of resistors 27 and 28 and outputs it as a detection signal K. The reference voltage generating section 16 generates reference voltage VREF from the base-emitter voltage of a bipolar transistor that is minimally affected by temperature and the manufacturing process so that the fluctuations of the detection level of the supply voltage VCC can be minimized.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: January 28, 2003
    Assignees: Hitachi, Ltd., Mitsubishi Denki Kabushiki Kaisha, Hitachi ULSI Systems Co., Ltd.
    Inventors: Hirofumi Sonoyama, Yoshiki Kawajiri, Masashi Wada, Jun Eto, Shinji Kawai