Patents by Inventor Jun Fukuhara
Jun Fukuhara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11945118Abstract: A method of planning works for robots includes creating a work plan for a plurality of robots, each having a work tool, sharing at at least one station a work to a plurality of work parts of the workpiece. The method includes the steps of calculating a distribution of the work parts to the robots, calculating, as a robot operation, a work order of the work parts and a moving path of the work tool for each of the robots based on the calculated work distribution, and calculating a disposed location of each of the robots with respect to the workpiece and a station where the robot is disposed so that an inter-robot interference does not occur during execution of the calculated robot operation.Type: GrantFiled: December 27, 2019Date of Patent: April 2, 2024Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHAInventors: Koichi Masaoka, Shota Asazu, Hiroyuki Moriishi, Tomoya Sakuma, Yuji Hashiba, Jun Fujimori, Hitoshi Nariai, Kazumi Fukuhara
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Patent number: 11848325Abstract: A load drive device includes a semiconductor element and a current detection resistor. The semiconductor element includes a first main electrode provided on a front surface side and having a higher potential and a second main electrode provided on a back surface side opposite to the front surface and having a lower potential than the first main electrode. The second main electrode is divided such that the semiconductor element includes a main element that supplies electric power to a load in response to the main element being turned on and a sense element that detects a current. The current detection resistor is connected in series to the sense element and provided between the second main electrode of the sense element and the second main electrode of the main element.Type: GrantFiled: November 11, 2021Date of Patent: December 19, 2023Assignee: DENSO CORPORATIONInventor: Jun Fukuhara
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Publication number: 20220068918Abstract: A load drive device includes a semiconductor element and a current detection resistor. The semiconductor element includes a first main electrode provided on a front surface side and having a higher potential and a second main electrode provided on a back surface side opposite to the front surface and having a lower potential than the first main electrode. The second main electrode is divided such that the semiconductor element includes a main element that supplies electric power to a load in response to the main element being turned on and a sense element that detects a current. The current detection resistor is connected in series to the sense element and provided between the second main electrode of the sense element and the second main electrode of the main element.Type: ApplicationFiled: November 11, 2021Publication date: March 3, 2022Inventor: Jun FUKUHARA
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Publication number: 20220029410Abstract: A current sense circuit includes channels a detection terminal, a feedback circuit and third-type switches. The channels respectively have first-type switches and second-type switches. Each of the first-type switches supplies an electric power to a load when the first-type switch is turned on. The second-type switches are respectively connected to the first-type switches in parallel, and respectively detect currents flowing through the first-type switches. The detection terminal is connected to the second-type switches. The feedback circuit includes a single operational amplifier having a first input terminal and a second input terminal. The first input terminal is connected to respective electrodes of the first-type switches close to the load. The second input terminal is connected to respective electrodes of the second-type switches close to the detection terminal. The third-type switches are connected to the electrodes of the first-type switches and the first input terminal.Type: ApplicationFiled: October 7, 2021Publication date: January 27, 2022Inventor: Jun FUKUHARA
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Patent number: 10217734Abstract: In a semiconductor device, a control circuit controls a potential difference of a switching element between a first terminal connected to a power source node and a second terminal connected to a first reference node. A first clamping circuit is connected between the first terminal and a control terminal of the switching element and is energized by a voltage equal to or higher than a first clamp voltage. A second clamping circuit is connected between the control terminal and the first reference node and clamps the potential difference to a second clamp voltage lower than the first clamp voltage. A third clamping circuit is connected between the control terminal and the second terminal. The control unit activates the second clamping circuit when a load current is equal to or greater than a predetermined threshold voltage, and activates the third clamping circuit after a predetermined time period elapses.Type: GrantFiled: February 27, 2017Date of Patent: February 26, 2019Assignee: DENSO CORPORATIONInventor: Jun Fukuhara
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Publication number: 20170256938Abstract: In a semiconductor device, a control circuit controls a potential difference of a switching element between a first terminal connected to a power source node and a second terminal connected to a first reference node. A first clamping circuit is connected between the first terminal and a control terminal of the switching element and is energized by a voltage equal to or higher than a first clamp voltage. A second clamping circuit is connected between the control terminal and the first reference node and clamps the potential difference to a second clamp voltage lower than the first clamp voltage. A third clamping circuit is connected between the control terminal and the second terminal. The control unit activates the second clamping circuit when a load current is equal to or greater than a predetermined threshold voltage, and activates the third clamping circuit after a predetermined time period elapses.Type: ApplicationFiled: February 27, 2017Publication date: September 7, 2017Inventor: Jun FUKUHARA
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Patent number: 8363372Abstract: Provided is a protection circuit that is connected between a power supply terminal and an output terminal, and turns off an output transistor when an abnormality occurs in a system, the output transistor outputting a current to a load connected to the output terminal, the protection circuit including: a first discharge unit that is connected between a gate electrode of the output transistor and the power supply terminal, and discharges an electric charge of the gate electrode until a potential of the gate electrode becomes equal to a power supply potential, when an abnormality occurs in the system, and a second discharge unit that is connected between the gate electrode and a source electrode of the output transistor, and discharges the electric charge of the gate electrode until the potential of the gate electrode becomes equal to an output potential, when an abnormality occurs in the system.Type: GrantFiled: June 18, 2010Date of Patent: January 29, 2013Assignee: Renesas Electronics CorporationInventors: Jun Fukuhara, Tsuyoshi Mitsuda
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Patent number: 8299841Abstract: A semiconductor device according to an exemplary embodiment of the present invention includes a discharge circuit and a control circuit. The discharge circuit includes a first transistor connected between a gate of an output transistor and an output terminal, and a capacitor connected to a gate of the first transistor, and discharges a gate voltage of the output transistor to the output terminal by turning on the first transistor with an electric charge of the capacitor. The control circuit includes a charge path, a first discharge path, and a second discharge path. The first discharge path discharges an electric charge of the charged capacitor when the system turns off. The second discharge path discharges the electric charge of the capacitor for a time period longer than a time period for discharging the output transistor by the discharge circuit upon detection of an abnormality in the system.Type: GrantFiled: October 12, 2010Date of Patent: October 30, 2012Assignee: Renesas Electronics CorporationInventors: Jun Fukuhara, Tsuyoshi Mitsuda
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Patent number: 7940114Abstract: A semiconductor device includes a fuse section having a plurality of fuse circuits configured to generate switch control signals; and an offset adjusting section configured to adjust an offset voltage of a differential amplifier based on the switch control signals supplied from output nodes of the plurality of fuse circuits. Each of the plurality of fuse circuits includes a fuse connected between a first power supply voltage and a cut node; a current source connected between a second power supply voltage and the output node; and a first transistor connected between the output node and the cut node and having a gate connected to the second power supply voltage.Type: GrantFiled: July 25, 2008Date of Patent: May 10, 2011Assignee: Renesas Electronics CorporationInventors: Jun Fukuhara, Tsuyoshi Mitsuda
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Publication number: 20110095738Abstract: A semiconductor device according to an exemplary embodiment of the present invention includes a discharge circuit and a control circuit. The discharge circuit includes a first transistor connected between a gate of an output transistor and an output terminal, and a capacitor connected to a gate of the first transistor, and discharges a gate voltage of the output transistor to the output terminal by turning on the first transistor with an electric charge of the capacitor. The control circuit includes a charge path, a first discharge path, and a second discharge path. The first discharge path discharges an electric charge of the charged capacitor when the system turns off. The second discharge path discharges the electric charge of the capacitor for a time period longer than a time period for discharging the output transistor by the discharge circuit upon detection of an abnormality in the system.Type: ApplicationFiled: October 12, 2010Publication date: April 28, 2011Inventors: Jun FUKUHARA, Tsuyoshi Mitsuda
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Publication number: 20110007442Abstract: Provided is a protection circuit that is connected between a power supply terminal and an output terminal, and turns off an output transistor when an abnormality occurs in a system, the output transistor outputting a current to a load connected to the output terminal, the protection circuit including: a first discharge unit that is connected between a gate electrode of the output transistor and the power supply terminal, and discharges an electric charge of the gate electrode until a potential of the gate electrode becomes equal to a power supply potential, when an abnormality occurs in the system, and a second discharge unit that is connected between the gate electrode and a source electrode of the output transistor, and discharges the electric charge of the gate electrode until the potential of the gate electrode becomes equal to an output potential, when an abnormality occurs in the system.Type: ApplicationFiled: June 18, 2010Publication date: January 13, 2011Applicant: NEC Electronics CorporationInventors: Jun Fukuhara, Tsuyoshi Mitsuda
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Publication number: 20090027107Abstract: A semiconductor device includes a fuse section having a plurality of fuse circuits configured to generate switch control signals; and an offset adjusting section configured to adjust an offset voltage of a differential amplifier based on the switch control signals supplied from output nodes of the plurality of fuse circuits. Each of the plurality of fuse circuits includes a fuse connected between a first power supply voltage and a cut node; a current source connected between a second power supply voltage and the output node; and a first transistor connected between the output node and the cut node and having a gate connected to the second power supply voltage.Type: ApplicationFiled: July 25, 2008Publication date: January 29, 2009Applicant: NEC ELECTRONICS CORPORATIONInventors: Jun FUKUHARA, Tsuyoshi Mitsuda
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Patent number: 6606577Abstract: A flicker sensitivity distribution measuring method is provided to maintain a subject in a fixation state and to accurately measure flicker sensitivity distribution. The sensitivity distribution measuring method includes the steps of displaying a target on a screen of a display while changing high and low luminances of a flickering target stepwise so that the average of the high luminance and the low luminance in each cycle of flickering of the target is always equal to the luminance of the screen serving as a background for the target, and determining a flicker sensitivity on the basis of the high luminance and the low luminance in one cycle of flickering of the target at a moment when the target is perceived.Type: GrantFiled: June 14, 1999Date of Patent: August 12, 2003Inventor: Jun Fukuhara