Patents by Inventor Jung-Yu Lee

Jung-Yu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128232
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Patent number: 11948798
    Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Chang, Jung-Hau Shiu, Jen Hung Wang, Tze-Liang Lee
  • Publication number: 20230404993
    Abstract: Disclosed herein is a method for alleviating a chronic liver disease, comprising administrating to a subject in need thereof a pharmaceutical composition containing rosoxacin.
    Type: Application
    Filed: November 11, 2022
    Publication date: December 21, 2023
    Inventors: Jinn-Moon Yang, Shey-Cherng Tzou, Ming-Lung Yu, Yun-Ti Chen, Hsiao-Chen Huang, Jung-Yu Lee
  • Publication number: 20200046654
    Abstract: A method for treating cancer in a subject is provided; the method includes administrating bupropion to the subject, wherein the tumor cells of the cancer overexpress neuronal acetylcholine receptor subunit ?9 (CHRNA9). Another method for treating cancer in a subject is provided; the method includes administrating a pharmaceutical composition to the subject, wherein the pharmaceutical composition includes: a therapeutically effective amount of bupropion and a pharmaceutically acceptable excipient; wherein the tumor cells of the cancer overexpress CHRNA9. A method for inhibiting migration of tumor cells is also provided; the method includes administrating an effective amount of bupropion to the tumor cells; wherein the tumor cells overexpress CHRNA9.
    Type: Application
    Filed: February 5, 2019
    Publication date: February 13, 2020
    Inventors: Jinn-Moon YANG, Chun-Yu LIN, Yi-Yuan CHIU, Jung-Yu LEE, Yuan-Soon HO, Chia-Hwa LEE
  • Patent number: 6963141
    Abstract: The package of the present invention includes a chip located on a substrate with signal transferring device electrically connected between them. Solder balls connect the substrate and thus electrically connect the substrate to external circuits. Molding compound is covered to protect the chip and signal transferring means. The heat-slug is capped over the molding compound through a conductive glue. The entire area of the upper surface of the heat-slug is exposed to the ambient to improve the ability to spread heat.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: November 8, 2005
    Inventors: Jung-Yu Lee, Chung-Hsing Tzu
  • Publication number: 20020145186
    Abstract: A method of forming a HSQFN (High Stand-off Quad Flat Non-leaded) package comprises providing a leadframe with bonding pads and die pads for receiving a die. Then, the die is attached on the die pad and bonding wires are connected between the bonding pads and the die for electrical connection. Molding process is used to encompass the die by compound from a first surface of the leadframe. Then, backside etching is used to etch the leadframe from a second surface of the leadframe to expose a lower surface of the compound, thereby separating the bonding pads and the die pads. A sigulation is applied to separate each individual package by cutting the leadframe and the compound.
    Type: Application
    Filed: April 9, 2001
    Publication date: October 10, 2002
    Inventors: Johnson C.H Tzu, Hsu Po Chih, Jerry Y.J. Wu, Jung Yu Lee
  • Publication number: 20020144840
    Abstract: The lead frame package with dummy chip comprising a lead frame with a plurality of first leads, molding compound, a dummy chip and a die. Wherein the molding compound encapsulates the die and the dummy chip, the dummy chip is arranged on a lower portion of the molding compound. The die is stacked on an upper surface of the dummy chip by using an adhesive material. A plurality of bonding wires are connected between the die and an end of the plurality of leads over the dummy chip.
    Type: Application
    Filed: April 9, 2001
    Publication date: October 10, 2002
    Inventors: Johnson C.H. Tzu, Jerry Y.J. Wu, Jung Yu Lee
  • Publication number: 20010019181
    Abstract: The package includes a chip located on a substrate with signal transferring device electrically connected between them. Solder balls connect the substrate and thus electrically connect the substrate to external circuits. Molding compound is covered to protect the chip and signal transferring means. The heat-slug is capped over the molding compound through a conductive glue. All area of the upper surface of the heat-slug is exposed to the ambient to improve the capability of spreading heat.
    Type: Application
    Filed: December 26, 2000
    Publication date: September 6, 2001
    Inventors: Jung-Yu Lee, Chung-Hsing Tzu
  • Patent number: 6101101
    Abstract: A leadframe for semiconductor devices is characterized in that the edge of the paddle has the shape of inclined plane which facilitate the silver epoxy to fill up the gap near the edge of the epoxy. The inclined plane on the paddle can also prevent the excessive silver epoxy from leaking to the bottom side of the paddle, which may cause delamination due to the poor adhesion between silver epoxy and plastic resin. Therefore the leadframe of the present utility can prevent moisture from accumulating within the package and the problem of pop corn.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: August 8, 2000
    Assignee: Sampo Semiconductor Corporation
    Inventors: Chung-Hsing Tzu, Jung-Yu Lee
  • Patent number: 5973407
    Abstract: The present invention disclose an Integral heat spreader for semiconductor package which is a metal plate and characterized in that a plurality of upper bumps are provided on the top surface of the metal plate. By the provision of the upper bumps, one or more space(s) can be formed between the bottom surface of the paddle and the top surface of the heat spreader for the compact filling of molding compound. Therefore, the occurrence of gap or delamination can be prevented, while maintaining the necessary effect of heat dissipation.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: October 26, 1999
    Assignee: Sampo Semiconductor Corporation
    Inventors: Chung-Hsing Tzu, Jung-Yu Lee
  • Patent number: 5754540
    Abstract: A 100BASE-T compliant integrated circuit multiport repeater provides one or more medium independent interfaces (MII's) and a plurality of physical interfaces. This facilitates connection of the repeater to one or more external medium access controller devices also implementing the MII standard. The multiport repeater device shares status, configuration and control management function of the MII among the plurality of physical ports. Therefore, only one MII physical address is needed for each multiport repeater, rather than for each physical transceiver in the system. The medium independent interfaces on the repeater chip share a number of pins and logic so that the total number of I/O pins required for a repeater chip according to the present invention with multiple medium independent interfaces is substantially reduced over a similar device which might have a plurality of independent medium independent interfaces.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: May 19, 1998
    Assignee: Macronix International Co., Ltd.
    Inventors: Chang-Chi Liu, Ming-Chang Su, Jung-Yu Lee