Patents by Inventor Jun Hashimoto
Jun Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7732783Abstract: An ultraviolet light monitoring system includes first and second electrodes, an evaluation subject film and a power source. The first and second electrodes are opposingly disposed and attract holes which are generated in accordance with irradiation of ultraviolet light. The evaluation subject film is formed in a vicinity of the first and second electrodes, and is a subject of evaluation of damage caused by the irradiation of ultraviolet light. The power source, at times of monitoring of the ultraviolet light, applies a predetermined bias to a series path formed by the first electrode, a gap between the first and second electrodes, and the second electrode.Type: GrantFiled: July 17, 2008Date of Patent: June 8, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Jun Hashimoto, Shinji Kawada, Ikuo Kurachi, Seiji Samukawa
-
Patent number: 7730371Abstract: There is provided a test apparatus for testing a memory under test that is addressable by the number of pulses of an address signal supplied thereto. The test apparatus includes a pattern generating section that generates writing data to be written into the memory under test, a first address generating section having an address information storing section that stores thereon address information indicating an address of the memory under test to which the writing data is to be written, and a waveform shaping section that generates an address signal by outputting one or more pulses at a predetermined time interval during a time period determined in accordance with the address information stored on the address information storing section.Type: GrantFiled: March 12, 2008Date of Patent: June 1, 2010Assignee: Advantest CorporationInventors: Tasuku Fujibe, Naoyoshi Watanabe, Jun Hashimoto
-
Publication number: 20100120439Abstract: An object is to urge a communication terminal connecting (or belonging) to a mobile terminal, to carry out a handover. A cell phone 1 has a relay unit 15 for relaying data transmitted between a digital camera 5 and a network, and a relay controller 17 for controlling the relay unit 15, based on a location state in a wireless LAN 3 derived based on a reception situation of a beacon from a base station 3a of the wireless LAN 3 different from a mobile communication network 2. The relay controller 17 cancels a connection to the digital camera 5 when the mobile terminal is located inside an area of the wireless LAN 3.Type: ApplicationFiled: November 2, 2009Publication date: May 13, 2010Applicant: NTT DoCoMo, Inc.Inventors: Jun HASHIMOTO, Hisashi Takeshita, Kentaro Itagaki, Nobuaki Sasao
-
Publication number: 20100118762Abstract: An object is to realize execution of an access point function while keeping power consumption low. A cell phone 1 has a relay unit 16 for relaying data transmitted between a digital camera 5 and a network, and a relay controller 17 for changing an operation state of the relay unit 16, based on a location state in a mobile communication network 2 derived based on a reception situation of a signal from a base station 2a of the mobile communication network 2, and a location information in a wireless LAN 3 derived based on a reception situation of a signal from a base station 3a of the wireless LAN 3.Type: ApplicationFiled: November 2, 2009Publication date: May 13, 2010Applicant: NTT DoCoMo, Inc.Inventors: Jun HASHIMOTO, Hisashi Takeshita, Kentaro Itagaki, Nobuaki Sasao
-
Publication number: 20100101897Abstract: In an elevator device, movement of a car is braked by a brake device in a state in which driving of a hoist is stopped. While the drive of the hoist is stopped, braking force of the brake device is controlled by a brake control device based on a signal from a movement detector that generates a signal corresponding to movement of the car. The brake control device generates a target pattern for at least one of speed and acceleration of the car and controls braking force of the brake device such that the movement of the car follows the target pattern.Type: ApplicationFiled: March 27, 2007Publication date: April 29, 2010Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Jun Hashimoto, Takaharu Ueda
-
Publication number: 20100078267Abstract: A car is suspended by suspension means and raised and lowered by means of a hoisting machine. Electric power supplied to a motor of the hoisting machine is controlled by an electric power converter. The electric power converter is controlled by means of a control apparatus. The control apparatus estimates a maximum value of a regenerative voltage at time of a regenerative operation of the hoisting machine when the car is running. When the estimated maximum value of the regenerative voltage reaches a predetermined voltage limit value, the control apparatus controls the electric power converter so as to stop an increase in estimated maximum value of the regenerative voltage.Type: ApplicationFiled: February 14, 2007Publication date: April 1, 2010Applicant: MITSUBISHI ELECTRIC CORPORATIONInventor: Jun Hashimoto
-
Publication number: 20090263840Abstract: The present invention provides an antibody capable of specifically recognizing the same amino acid sequence as an antigenic determinant of mouse monoclonal antibody MAB-ME-16F4.3 (FERM BP-10329), and an antibody of capable of specifically recognizing the same amino acid sequence as an antigenic determinant of mouse monoclonal antibody MAB-ME-12C9.2 (FERM BP-10328), and methods of risk prediction of bone fracture and/or diagnosis of osteoporosis by detecting a MEPE-derived molecule in a biological sample using the above-mentioned two kinds of antibodies.Type: ApplicationFiled: September 14, 2006Publication date: October 22, 2009Inventors: Jun Hashimoto, Akihide Nampei, Wataru Ando, Tomofumi Kurokawa, Tsutomu Oshima
-
Publication number: 20090167176Abstract: A PDP can be driven at low voltage while having a charge retention property in a protection layer, and has favorable image display properties. Additionally, the PDP prevents the occurrence of discharge delay and realizes high-quality image display by performing favorable high-speed driving in a high definition PDP. To achieve this, a surface layer (8) is formed to a film thickness of 1 ?m in an oxygen atmosphere having an oxygen partial pressure of 0.025 Pa or more, the surface layer (8) is provided on a face of a dielectric layer (7) on a discharge space side. Furthermore, MgO particles (16) are dispersed on a surface of the surface layer (8). The surface layer (8) has the effects of protecting the dielectric layer (7) from ion bombardment during discharge, reducing the firing voltage, and preventing excessive electron loss. Also, the MgO particles (16) have a high initial electron emission property.Type: ApplicationFiled: April 27, 2007Publication date: July 2, 2009Inventors: Yusuke Fukui, Takuji Tsujita, Jun Hashimoto, Hikaru Nishitani, Masaharu Terauchi, Mikihiko Nishitani
-
Publication number: 20090077435Abstract: There is provided a test apparatus for testing a memory under test that is addressable by the number of pulses of an address signal supplied thereto. The test apparatus includes a pattern generating section that generates writing data to be written into the memory under test, a first address generating section having an address information storing section that stores thereon address information indicating an address of the memory under test to which the writing data is to be written, and a waveform shaping section that generates an address signal by outputting one or more pulses at a predetermined time interval during a time period determined in accordance with the address information stored on the address information storing section.Type: ApplicationFiled: March 12, 2008Publication date: March 19, 2009Applicant: ADVANTEST CORPORATIONInventors: TASUKU FUJIBE, NAOYOSHI WATANABE, JUN HASHIMOTO
-
Patent number: 7501763Abstract: Provided is a gas discharge display panel that exhibits a favorable display performance by maintaining a wall charge retaining power, controlling discharge delay within a range adequate for optimal image display, and reducing the discharge starting voltage at comparatively low cost. Also provided is a PDP that exhibits more reliability with enhanced display quality by further improving the secondary electron emission factor ? compared to conventional cases and lowering the discharge starting voltage to widen the driving margin. In addition, provided is a manufacturing method of a gas discharge display panel, by which the manufacturing cost lowers by reduction of the exhaustion time in the sealing exhaustion process, and by which the driving circuit cost is reduced. In the present invention, the protective layer contains, with respect to a MgO content of the protective layer, Si in a range of 20 mass ppm to 5000 mass ppm inclusive and H in a range of 300 mass ppm to 10000 mass ppm inclusive.Type: GrantFiled: April 7, 2005Date of Patent: March 10, 2009Assignee: Panasonic CorporationInventors: Jun Hashimoto, Masatoshi Kitagawa, Mikihiko Nishitani, Masaharu Terauchi, Shinichi Yamamoto
-
Publication number: 20090058432Abstract: An ultraviolet light monitoring system includes first and second electrodes, an evaluation subject film and a power source. The first and second electrodes are opposingly disposed and attract holes which are generated in accordance with irradiation of ultraviolet light. The evaluation subject film is formed in a vicinity of the first and second electrodes, and is a subject of evaluation of damage caused by the irradiation of ultraviolet light. The power source, at times of monitoring of the ultraviolet light, applies a predetermined bias to a series path formed by the first electrode, a gap between the first and second electrodes, and the second electrode.Type: ApplicationFiled: July 17, 2008Publication date: March 5, 2009Applicants: OKI ELECTRIC INDUSTRY CO., LTD., TOHOKU UNIVERSITYInventors: Jun Hashimoto, Shinji Kawada, Ikuo Kurachi, Seiji Samukawa
-
Publication number: 20090022109Abstract: The present invention provides a mobile terminal and a method of executing scanning for radio signals in the case where the mobile terminal is connectable to multiple radio communication systems employing different radio communication schemes. The mobile terminal and the method can scan for radio signals transmitted from a radio base station at an appropriate timing without modifying the existing radio base station or the like. The mobile terminal includes a WLAN controller configured to cause a WLAN communication unit to execute scanning for radio signals transmitted from an access point. Scanning is executed if a scrambling code determining unit determines that a scrambling code contained in notification matches a scrambling code stored in a scrambling code information storage, and if a position determining unit determines that a certain position indicated by position information stored in a GPS position information storage is within a predetermined distance from a current position of the mobile terminal.Type: ApplicationFiled: July 16, 2008Publication date: January 22, 2009Applicant: NTT DoCoMo, Inc.Inventor: Jun Hashimoto
-
Publication number: 20080278074Abstract: Provided is a gas discharge display panel that exhibits a favorable display performance by maintaining a wall charge retaining power, controlling discharge delay within a range adequate for optimal image display, and reducing the discharge starting voltage at comparatively low cost. Also provided is a PDP that exhibits more reliability with enhanced display quality by further improving the secondary electron emission factor ? compared to conventional cases and lowering the discharge starting voltage to widen the driving margin. Further provided is a manufacturing method of a gas discharge display panel, by which the manufacturing cost lowers by reduction of the exhaustion time in the sealing exhaustion process, and by which the driving circuit cost is reduced.Type: ApplicationFiled: April 7, 2005Publication date: November 13, 2008Inventors: Shinichi Yamamoto, Mikihiko Nishitani, Masaharu Terauchi, Jun Hashimoto, Masatoshi Kitagawa
-
Publication number: 20070216302Abstract: Provided is a gas discharge display panel that exhibits a favorable display performance by maintaining a wall charge retaining power, controlling discharge delay within a range adequate for optimal image display, and reducing the discharge starting voltage at comparatively low cost. Also provided is a PDP that exhibits more reliability with enhanced display quality by further improving the secondary electron emission factor ? compared to conventional cases and lowering the discharge starting voltage to widen the driving margin. In addition, provided is a manufacturing method of a gas discharge display panel, by which the manufacturing cost lowers by reduction of the exhaustion time in the sealing exhaustion process, and by which the driving circuit cost is reduced. In the present invention, the protective layer contains, with respect to a MgO content of the protective layer, Si in a range of 20 mass ppm to 5000 mass ppm inclusive and H in a range of 300 mass ppm to 10000 mass ppm inclusive.Type: ApplicationFiled: April 7, 2005Publication date: September 20, 2007Inventors: Jun Hashimoto, Masatoshi Kitagawa, Mikihiko Nishitani, Masaharu Terauchi, Shinichi Yamamoto
-
Publication number: 20060069524Abstract: While a voltage value of the battery detected by a battery voltage-detecting part is less than a predetermined threshold voltage value for determining a low voltage state, a rotation sensor malfunction-detecting part stops calculating a vehicle speed and uses the vehicle speed calculated at a time immediately before a time when a voltage value of a battery becomes less than the threshold voltage value for determining the low voltage state, for detecting malfunction in a rotation sensor.Type: ApplicationFiled: September 29, 2005Publication date: March 30, 2006Applicant: JATCO Ltd.Inventors: Jun Hashimoto, Satoshi Takizawa, Atsushi Kobayashi, Shuji Kurokawa, Yasukazu Maekawa, Masatoshi Akanuma
-
Patent number: 6727144Abstract: A manufacturing method for a semiconductor storage device with a floating gate includes a first step for depositing a first thermally-oxidized film (14) on a poly-silicon film (12) that has been etched to a desired depth so as to have a tapered etched end by using a silicon nitride film (13) having an opening as a mask, a step for depositing a first NSG film side wall spacer (115) that covers the tapered portion on an opening side wall of the silicon nitride film (13) and adding heat treatment thereto, a step for forming a second NSG film side wall spacer (15) on the inner side of the first NSG film side wall spacer 115, a step for forming a poly-silicon plug (18), then depositing a second thermally-oxidized film (19) on the poly-silicon plug (18), a step for removing the silicon nitride film (13), then etching the poly-silicon film (12), and a step for removing the first NSG film side wall spacer (115).Type: GrantFiled: October 31, 2002Date of Patent: April 27, 2004Assignee: Oki Electric Industry Co., Ltd.Inventor: Jun Hashimoto
-
Publication number: 20030235951Abstract: A manufacturing method for a semiconductor storage device with a floating gate includes a first step for depositing a first thermally-oxidized film (14) on a polysilicon film (12) that has been etched to a desired depth so as to have a tapered etched end by using a silicon nitride film (13) having an opening as a mask, a step for depositing a first NSG film side wall spacer (115) that covers the tapered portion on an opening side wall of the silicon nitride film (13) and adding heat treatment thereto, a step for forming a second NSG film side wall spacer (15) on the inner side of the first NSG film side wall spacer 115, a step for forming a poly-silicon plug (18), then depositing a second thermally-oxidized film (19) on the poly-silicon plug (18), a step for removing the silicon nitride film (13), then etching the poly-silicon film (12), and a step for removing the first NSG film side wall spacer (115).Type: ApplicationFiled: October 31, 2002Publication date: December 25, 2003Inventor: Jun Hashimoto
-
Patent number: 6268878Abstract: A head controller 2 reads out adjustment data from a ROM 3 immediately after a power-on operation. The adjustment data is prepared for adjusting unevenness of light emission from LEDs in a LED head 5. A buffer memory 4 stores the read adjustment data. The head controller 2 reads the adjustment data from the buffer memory 4 with high data transfer rate, and obtains bitmap data from a frame memory or the like (not shown). The head controller 2 sends the read bitmap data and the adjustment data to an anode driver 51. The head controller 2 sends a strobe signal to the anode driver 51 and a cathode driver 53. The anode driver 51 adjusts ampere of supplied currents (i.e. drive signals corresponding to the bitmap data) from the head controller 2, in accordance with the received adjustment data in response to the reception of the strobe signal. The adjusted drive signals are sent to LED array chips 52.Type: GrantFiled: November 2, 1998Date of Patent: July 31, 2001Assignees: Casio Computer Co., Ltd., Casio Electronics Manufacturing Co., Ltd.Inventors: Toshiaki Yajima, Jun Hashimoto, Toshio Nagasaka
-
Patent number: 5945156Abstract: A method of manufacturing a magnetic recording medium having excellent magnetostatic and electromagnetic conversion properties for high density recording is provided, wherein magnetic powder (P) is kneaded with a binding agent (B) mainly comprising low molecular weight vinyl chloride resin whose number-average molecular weight is 8000 to 20000 with a P/B ratio of 7 or more before preparing the magnetic coating material so as to be coated on a non-magnetic base material.Type: GrantFiled: August 7, 1997Date of Patent: August 31, 1999Assignee: Sony CorporationInventors: Yoshihiro Shimizu, Jun Hashimoto, Taro Ohmura
-
Patent number: 5796748Abstract: A semiconductor test system makes possible to test memory devices having arbitrary latency cycles when using a plurality of pattern generators. In each of the pattern generators, a fixed cycle shift circuit shifts an expected value signal by one cycle with the operating period of the pattern generator, a selector selects one of the expected value signals from the plurality of pattern generators including the pattern generator of itself, and cycle shift circuit is provided at the output of the selector. In another aspect, the semiconductor test system further includes a plurality of timing generators for generating a plurality of strobe signals to be supplied to a comparator, and a plurality of phase converters for shifting the phases of the expected value pattern from the pattern generators.Type: GrantFiled: July 15, 1997Date of Patent: August 18, 1998Assignee: Advantest Corp.Inventors: Takahiro Housako, Jun Hashimoto