Abstract: A parallel output linear amplifier is provided that includes a transconductance amplifier configured to receive an analog input signal from an input terminal and amplify the analog input signal. The parallel output linear amplifier also includes a first pre-amplifier connected to the transconductance amplifier and operated using a floating drive voltage, and a cascode class AB amplifier connected to the first pre-amplifier and configured to provide an amplified signal to an output terminal. The parallel output linear amplifier further includes a second pre-amplifier configured connected to the transconductance amplifier and operated using the floating drive voltage, and a cascade class AB amplifier connected to the second pre-amplifier and configured to provide an amplified signal to the output terminal.

Abstract: A method and a supply modulator (SM) are provided for supplying power from a wireless transmitter to a radio frequency (RF) power amplifier. A power control signal input from a modem is received. A reference voltage is determined. An operating mode of the SM is changed by controlling a level of the reference voltage. A voltage is determined based on the level of a reference voltage. When the operating mode of the SM is an ET mode, a first output signal from a linear regulator and a second output signal from a switching regulator are combined to obtain a combined result, and the combined result is output. The first output signal is based on the voltage. When the operating mode of the SM is an APT mode, the voltage based on the reference voltage is output.

Abstract: A transmitter in a wireless communication system is provided. The transmitter includes a baseband signal processor for detecting an envelope signal, a supply modulator (SM) for producing power to be supplied to a power amplifier using the detected envelope signal, and the power amplifier for receiving voltage from the SM and for amplifying power of a transmit signal. The SM generates a compensation signal corresponding to switching noise generated via switching amplification, and adds the compensation signal and the switching noise. The amplifier of the wireless communication system can produce low switching noise, and the envelope tracking power amplifier can prevent reception degradation due to the noise of the supply modulator.

Abstract: Disclosed herein is a battery assembly including at least two battery cells connected in series or in parallel. Each of the battery cells includes an electrode assembly including a cathode, an anode and a separator interposed between the cathode and the anode and a battery case in which the electrode assembly is mounted. An electrode terminal of a first battery cell and an electrode terminal of a second battery cell are formed as a single member at a series or parallel connection portion between the first and second battery cells.

Abstract: Disclosed herein is a battery module including a battery cell stack configured to have a rectangular parallelepiped structure in which two or more plate-shaped battery cells, each of which has electrode terminals formed at one side thereof, are stacked and a breadth of one surface of the battery cell stack at which the electrode terminals of the battery cells are disposed is smaller than a width and a height of each major surface of the battery cell stack, a first module case bent to surround two relatively large major surfaces of the battery cell stack and one surface of the battery cell stack opposite to the surface of the battery cell stack at which the electrode terminals of the battery cells are disposed, among six surfaces of the battery cell stack and a surface, the first module case being made of a thermally conductive material that is capable of dissipating heat generated from the battery cells during charge and discharge of the battery cells, and a second module case bent to surround side surfaces o

Abstract: Disclosed herein is a real-time face recognition apparatus and method. A real-time face recognition apparatus includes a face detection unit for detecting a face image by obtaining image coordinates of a face from an input image. An eye detection unit obtains image coordinates of both eyes in the face image. A facial feature extraction unit generates feature histogram data based on parallel processing from the face image. A DB unit stores predetermined comparative feature histograms. A histogram matching unit compares the histogram data generated by the facial feature extraction unit with the comparative feature histograms, and then outputting similarities of face images. The face recognition apparatus may be implemented as internal hardware in which a VGA camera and an exclusive chip interface with each other, thus remarkably reducing a system size and installation cost, and performing face recognition in real time without requiring additional equipment.