Abstract: In a method of testing a display apparatus, a plurality of minimum compensation data for a plurality of grayscales, respectively and a plurality of maximum compensation data for the plurality of grayscales, respectively are determined. The display apparatus includes a display panel displaying an image having the plurality of grayscales. A plurality of grayscale compensation data corresponding to the plurality of grayscales, respectively are set based on the plurality of minimum compensation data and the plurality of maximum compensation data. A flicker characteristic with respect to the plurality of grayscales is measured based on the plurality of grayscale compensation data and test images displayed on the display panel. The flicker characteristic is optimized by selectively changing the plurality of grayscale compensation data based on the measured flicker characteristic.

Abstract: A flexible circuit film includes a first flexible film, a second flexible film facing the first flexible film, a plurality of wirings arranged between the first flexible film and the second flexible film and extending in a first direction, then bending to extend in a second direction crossing the first direction, and then bending a second time to extend in an opposing direction to the first direction, and a guide film including a material more rigid than the first and second flexible films and arranged on an ends of the first flexible film. The guide film includes a tear-preventing portion overlapping with a bending portion of a shortest one of the wirings while covering portions of an inner edge near inner corners of a U-shaped flexible circuit film.

Abstract: A display device includes: a display panel including gate lines, a data lines crossing the gate lines, and pixels connected to the data lines and the gate lines; a data driver configured to drive the data lines; a gate driver configured to drive the gate lines in synchronization with a vertical sync start signal; and a timing controller configured to control the data driver and the gate driver in response to an image signal and a control signal inputted thereto from an outside, where the timing controller outputs the vertical sync start signal to the gate driver, and changes a frequency of the vertical sync start signal when an image signal of a current frame is identical to an image signal shifted from an image signal of a previous frame in a first direction.

Abstract: An image signal modifying method is disclosed. In one aspect, the image signal modifying method includes inputting a gray level interval of a first dynamic capacitance compensation (DCC) lookup table to a current gray level which is a target in a previous image signal when it is overdriven (DTG) and 0 to a gray level of the previous image signal (PIG). The method also includes searching for a data value in an adaptive color correction (ACC) lookup table corresponding to a gray level equal to a numerical value of the DTG (ALT) and performing an algorithm based on the DTG, the ALT, and the gray level interval of the first DCC lookup table. The method further includes generating a second DCC lookup table based on the algorithm, and performing second DCC processing on the input image signal based on the second DCC lookup table.

Abstract: A method of driving a display panel includes determining a first black gap corresponding to a 2D mode and a second black gap corresponding to a 3D mode. The first and second black gaps are different from each other, the first and second black gaps correspond to a voltage difference between a black voltage of a first polarity and a black voltage of a second polarity, and the first and second polarities are opposite to each other with respect to a reference voltage. The method further includes dividing a voltage difference between a white voltage of the first polarity and the black voltage of the first polarity to generate a plurality of gamma voltages of the first polarity, and dividing a voltage difference between a white voltage of the second polarity and the black voltage of the second polarity to generate a plurality of gamma voltages of the second polarity.

Abstract: A method of driving a display panel, the method including outputting video data to a display panel during an N-th (N is a natural number) frame, outputting video data to the display panel during an (N+1)-th frame, comparing polarities of video data of the N-th frame and corresponding polarities of video data of the (N+1)-th frame, and controlling polarities of video data of an (N+2)-th frame, according to the result of the comparison.

Abstract: A boosting voltage generator includes a switching circuit, a control circuit and a boosting circuit. The switching circuit is connected to a first input terminal receiving a first frame signal and a second input terminal receiving a second frame signal, and generates a first switching signal and a second switching signal based on a voltage at the first input terminal and a voltage at the second input terminal. The second frame signal has a phase opposite to that of the first frame signal. The control circuit is connected to the first and second input terminals, and selectively connects the first and second input terminals with a ground voltage based on a mode selection signal. The boosting circuit generates a first boosting voltage and a second boosting voltage based on the first switching signal, the second switching signal, a first feedback voltage and a second feedback voltage.

Abstract: A display panel driving apparatus is disclosed. In one aspect the apparatus includes a gate driving part and a data driving part. The gate driving part is configured to increase a gate signal applied to a gate line of a display panel from an OFF voltage to a ON voltage, in response to an activation of a gate clock signal. It is also configured to decrease the gate signal from the ON voltage to a kickback compensation voltage between the OFF voltage and the ON voltage through a plurality of steps in response to an activation of a kickback compensation signal. The data driving part is configured to apply a data signal to a data line of the display panel. Therefore, a data-charging rate may be increased, and thus a display quality of the display apparatus may be increased.

Abstract: A display apparatus includes a display panel, a gate driver, a counter and a power generator. The display panel includes a gate line and a pixel electrically connected to the gate line. The gate driver is configured to set a voltage level and an output timing of a gate signal applied to the gate line based on a gate driving voltage and a first control signal. The gate driving voltage includes a gate on voltage and a gate off voltage. The counter is configured to increase a count value based on the first control signal. The power generator is configured to adjust a level of the gate driving voltage based on the count value.

Abstract: A display apparatus including a plurality of pixels arranged in association with a plurality of gate lines and a plurality of data lines crossing the gate lines, a data driver configured to drive the data lines, a gate driving unit configured to drive the gate lines in synchronization with a gate control signal, and a timing controller configured to control the data driver and the gate driving unit in response to an image signal and a control signal from an exterior. The timing controller outputs the gate control signal including a plurality of pulses respectively corresponding to the gate lines and an enable time of each pulse of the gate control signal is set according to a position of a corresponding gate line of the gate lines.

Abstract: A display device is provided. A display device comprising, a gate voltage generator outputting a gate-on voltage and a gate-off voltage, a clock generator receiving the gate-on voltage and the gate-off voltage and outputting a clock signal, a gate driver receiving the clock signal and outputting a gate signal , the gate driver including a plurality of stages which are connected to a plurality of gate lines respectively, and a pixel unit comprising a plurality of pixels which are turned on or turned off by the gate signal to display an image, wherein the gate voltage generator comprises, a direct current (DC) converter connected to a sub-gate node and receiving a sub-gate signal which is one of outputs of the plurality of stages gate driver and outputting a compensation voltage using the received sub-gate signal.

Abstract: An apparatus and method for providing a graphic user interface which is used in a display device operated by a remote controller are provided. A graphic user interface screen includes a main information display area for displaying main information in the form in which a plurality of main elements are recursively disposed and a sub-information display area for displaying sub-information including supplementary information according to information provided on the main information display area. At least one sub-element included in a main element is operated by a direction selection signal which indicates a direction perpendicular to a disposition direction of the main elements.

Abstract: A display apparatus includes pixels connected to gate lines and data lines crossing the gate lines, a data driver which drives the data lines, a gate driver which drives the gate lines, a timing controller which controls the data driver and the gate driver in response to an image signal and a control signal and outputs a first kickback signal and a second kickback signal, and a voltage generator which outputs a first gate-on voltage and a second gate-on voltage in response to the first and second kickback signals to drive the gate lines. The gate driver drives a first group of gate lines in response to the first gate-on voltage and drives a second group of the gate lines in response to the second gate-on voltage.

Abstract: In a method of testing a display apparatus, a plurality of minimum compensation data for a plurality of grayscales, respectively and a plurality of maximum compensation data for the plurality of grayscales, respectively are determined. The display apparatus includes a display panel displaying an image having the plurality of grayscales. A plurality of grayscale compensation data corresponding to the plurality of grayscales, respectively are set based on the plurality of minimum compensation data and the plurality of maximum compensation data. A flicker characteristic with respect to the plurality of grayscales is measured based on the plurality of grayscale compensation data and test images displayed on the display panel. The flicker characteristic is optimized by selectively changing the plurality of grayscale compensation data based on the measured flicker characteristic.

Abstract: A control board in a display device includes terminals and a control circuit. The control circuit is configured to output a control signal an image signal through the terminals and to generate a drive voltage in response to a feedback signal, which is fed back to a second terminal of the terminals when a source voltage is applied to a first terminal of the terminals.

Abstract: A method of driving a display panel includes charging a pixel with first data during a first charging period, comparing a first grayscale of the first data and a second grayscale of second data, charging the pixel with compensated data during a second charging period if the first grayscale is greater than the second grayscale, and charging the pixel with the second data during a third charging period.

Abstract: A display device includes a display panel, a gate driver, a gate clock signal modulating unit, and a gate clock signal generator. The display panel includes gate lines and pixels connected to the gate lines via respective switching elements. The gate driver includes stages configured to output gate signals to the gate lines. The gate clock signal modulating unit is configured to modulate an input gate clock signal based on a scanning start signal to generate an output gate clock signal. The gate clock signal generator is configured to generate a clock signal based on the gate clock signal and output the clock signal to the gate driver. The gate clock signal modulating unit is configured to modulate a width of a pulse of the input gate clock signal overlapping a pulse of the scanning start signal.

Abstract: A display device includes gate lines, data lines, pixels, a gate driver, a data driver, and a timing controller. The gate lines extend in a first direction. The data lines extend in a second direction crossing the first direction. Each of the pixels is connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines. The gate driver is configured to drive the gate lines. The data driver is configured to drive each data line of the data lines in response to a corresponding data signal. The timing controller is configured to, in response to an image signal and a control signal, apply the corresponding data signals to the data driver and control the gate driver. Each corresponding data signal reflects a kickback compensation value corresponding to a distance between the gate driver and the corresponding data line in the first direction.

Abstract: A flexible circuit film includes a first flexible film, a second flexible film facing the first flexible film, a plurality of wirings arranged between the first flexible film and the second flexible film and extending in a first direction, then bending to extend in a second direction crossing the first direction, and then bending a second time to extend in an opposing direction to the first direction, and a guide film including a material more rigid than the first and second flexible films and arranged on an ends of the first flexible film. The guide film includes a tear-preventing portion overlapping with a bending portion of a shortest one of the wirings while covering portions of an inner edge near inner corners of a U-shaped flexible circuit film.

Abstract: A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.