Abstract: A display device is disclosed that includes a base substrate, an organic light emitting element disposed on the base substrate, an insulating layer disposed on the base substrate and containing silicon oxide, and a thin film transistor disposed on the base substrate and electrically connected to the organic light emitting element, wherein the thin film transistor includes a semiconductor pattern disposed on the base substrate and including a channel area in contact with the insulating layer, and a gate electrode overlapping the channel area on a plane, wherein the semiconductor pattern contains indium gallium zinc tin oxide.

Abstract: A display device includes a substrate, a corrosion prevention layer on the substrate and including an inorganic material, a first conductive layer on the corrosion prevention layer and including aluminum or an aluminum alloy, a first insulating film on the first conductive layer, a semiconductor layer on the first insulating film and including a channel region of a transistor, a second insulating film on the semiconductor layer, and a second conductive layer on the second insulating film and including a barrier layer, which includes titanium, and a main conductive layer, which includes aluminum or an aluminum alloy, wherein the semiconductor layer includes an oxide semiconductor, and the barrier layer is between the semiconductor layer and the main conductive layer and overlaps the channel region of the transistor.

Abstract: A display device may include a first gate electrode on a substrate, a buffer layer on the first gate electrode, a first active pattern on the buffer layer, overlapping the first gate electrode, and including an oxide semiconductor, a source pattern and a drain pattern respectively on ends of the first active pattern, an insulation layer overlapping the source pattern and the drain pattern on the buffer layer, an oxygen supply pattern on the insulation layer, overlapping the first active pattern, and supplying oxygen to the first active pattern, a second active pattern on the insulation layer and spaced apart from the oxygen supply pattern, the second active pattern including a channel region, and a source region and a drain region, an insulation pattern on the channel region of the second active pattern, and a second gate electrode on the insulation pattern.

Abstract: A display device according to an embodiment includes: a first metal layer disposed on a substrate; a first insulating layer disposed on the first metal layer; a first transistor disposed on the first insulating layer and including a semiconductor layer; and a light-emitting device electrically connected to the first transistor, wherein the first metal layer includes a first portion with a first thickness and a second portion with a second thickness, the second thickness is greater than the first thickness, and the semiconductor layer is electrically connected to the first metal layer.

Abstract: According to some embodiments of the present disclosure, a display device includes an active pattern including a metal oxide, a gate electrode overlapping the active pattern, a first capacitor electrode spaced apart from the active pattern and including a conductive oxide, and a second capacitor electrode on the first capacitor electrode.

Abstract: A display device includes: a buffer layer including an inorganic insulating material, an active pattern disposed on the buffer layer and including a channel region and a first conductor region adjacent to the channel region, a gate insulating layer disposed on the buffer layer and the active pattern and including an inorganic insulating material, a gate electrode layer including a first electrode extending along a side surface of the gate insulating layer and including a first contact portion electrically contacting the first conductor region, and an oxygen supply layer including a first pattern disposed between the first electrode and the gate insulating layer, wherein the first pattern includes a first groove recessed from a side surface of to surround at least a part of the first contact portion in a plan view.

Abstract: A display device includes a first lower electrode disposed on a base substrate, a first upper electrode disposed on the first lower electrode, overlapping the first lower electrode in a plan view, including a silicon semiconductor, and constituting a first capacitor together with the first lower electrode, a second lower electrode disposed on the first upper electrode, and a second upper electrode disposed on the second lower electrode, overlapping the second lower electrode in a plan view, including an oxide semiconductor, and constituting a second capacitor together with the second lower electrode.

Abstract: A display device according to an embodiment includes a light blocking layer disposed on a substrate; an oxygen supply layer disposed on and contacting the light blocking layer; a semiconductor layer disposed on the oxygen supply layer; and a light emitting diode electrically connected with the semiconductor layer. The semiconductor layer includes an oxide semiconductor, and the oxygen supply layer includes a metal oxide that includes at least one of indium, zinc, gallium, and tin.

Abstract: A display device includes a light emitting element, a first transistor, a second transistor, and a diode. The first transistor may control a driving current flowing to the light emitting element depending on a voltage applied to a gate electrode of the first transistor. The second transistor is electrically connected between the gate electrode of the first transistor and a first electrode of the first transistor. A first electrode of the diode is electrically connected to a first electrode of the second transistor. A second electrode of the diode is electrically connected to the gate electrode of the first transistor.

Abstract: An organic light emitting display device includes a substrate including a light emitting region, a first active layer having a source region and a drain region disposed in the light emitting region on the substrate, a gate insulation layer disposed on the first active layer, a first gate electrode disposed on the gate insulation layer, a first insulating interlayer disposed on the first gate electrode, a second insulating interlayer disposed on the first insulating interlayer, a first source electrode disposed on the second insulating interlayer, the first source electrode being connected to the source region of the first active layer through a contact hole formed in the gate insulation layer, the first insulating interlayer, and the second insulating interlayer, a protective insulating layer disposed on the first source electrode, a first drain electrode disposed on the protective insulating layer, the first drain electrode being connected to the drain region of the first active layer through a contact hole

Abstract: A method may be used for manufacturing a semiconductor element. The method may include the following steps: preparing a substrate; forming a semiconductor layer on the substrate, wherein the semiconductor layer includes crystallized two-dimensional layers; forming a source electrode and a drain electrode on the semiconductor layer; forming an semiconductor member by wet etching the semiconductor layer using sodium hypochlorite as an etchant, wherein the wet etching results in a residue; and removing the residue using purified water and an inert gas.

Abstract: A display device includes a substrate, a corrosion prevention layer on the substrate and including an inorganic material, a first conductive layer on the corrosion prevention layer and including aluminum or an aluminum alloy, a first insulating film on the first conductive layer, a semiconductor layer on the first insulating film and including a channel region of a transistor, a second insulating film on the semiconductor layer, and a second conductive layer on the second insulating film and including a barrier layer, which includes titanium, and a main conductive layer, which includes aluminum or an aluminum alloy, wherein the semiconductor layer includes an oxide semiconductor, and the barrier layer is between the semiconductor layer and the main conductive layer and overlaps the channel region of the transistor.

Abstract: A display device and a manufacturing method of the display device are provided. The display device includes a substrate, a passivation layer disposed on the substrate, a metal oxide layer disposed on the passivation layer, a via layer disposed on the metal oxide layer, a first electrode disposed on the via layer, a pixel defining layer covering the metal oxide layer and an edge portion of the first electrode and dividing a light-emitting area, an organic layer disposed on the first electrode and the pixel defining layer, and a second electrode disposed on the organic layer, wherein a side of the pixel defining layer protrudes more outward than a side of the metal oxide layer, and at least a portion of the organic layer is disconnected at a point between the side of the pixel defining layer and the passivation layer.

Abstract: Provided is a transistor including a first electrode, an active layer disposed under the first electrode and having a hole pattern with at least one hole in the source region, a drain region, and an active region overlapping the first electrode, and a second electrode disposed under the active layer. At least one of the first electrode and the second electrode overlaps the hole pattern. This way, the area of the transistor may be reduced, thereby achieving a display panel having a narrow bezel and reducing parasitic capacitance.

Abstract: A display device comprises a substrate; a driving transistor including a first active layer and a switching transistor including a second active layer, the first active layer and the second active layer being disposed on the substrate; a first gate insulating layer disposed on the first active layer of the driving transistor and the second active layer of the switching transistor; first and second gate electrodes disposed on the first gate insulating layer to overlap the first active layer of the driving transistor and the second active layer of the switching transistor, respectively; a first interlayer insulating layer disposed on the first gate electrode and the second gate electrode; and a second interlayer insulating layer disposed on the first interlayer insulating layer to overlap the first active layer without overlapping the second active layer in a plan view.

Abstract: A display device includes a first lower electrode disposed on a base substrate, a first upper electrode disposed on the first lower electrode, overlapping the first lower electrode in a plan view, including a silicon semiconductor, and constituting a first capacitor together with the first lower electrode, a second lower electrode disposed on the first upper electrode, and a second upper electrode disposed on the second lower electrode, overlapping the second lower electrode in a plan view, including an oxide semiconductor, and constituting a second capacitor together with the second lower electrode.

Abstract: A display device includes a base substrate including a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area, first to third thin film transistors on the base substrate and including first to third active patterns, respectively, first to third pixel electrodes electrically connected to the first to third thin film transistors, respectively and in the first to third sub-pixel areas, respectively, a blue light emitting layer on the first to third pixel electrodes and configured to emit a blue light, a first color conversion pattern in the first sub-pixel area on the blue light emitting layer, a second color conversion pattern in the second sub-pixel area on the blue light emitting layer, and a red color filter layer between the blue light emitting layer and the first to third active patterns.

Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.

Abstract: A display apparatus including a base substrate, a first thin film transistor disposed on the base substrate, a via insulation layer disposed on the first thin film transistor, and a light emitting structure disposed on the via insulation layer. The first thin film transistor includes a first gate electrode, an oxide semiconductor overlapped with the first gate electrode, and including tin (Sn), an etch stopper disposed on the oxide semiconductor and including an oxide semiconductor material which does not include tin (Sn), a first source electrode making contact with the oxide semiconductor, and a first drain electrode making contact with the oxide semiconductor, and spaced apart from the first source electrode.

Abstract: Provided is a defect analysis device which may include a light source that irradiates an analysis target layer of an element with light, a position adjuster that adjusts a position in the analysis target in the analysis target to be irradiated with the light, a detector that measures a current value of current flowing between a source area of the element electrically connected to one end of the analysis target layer and a drain area of the element electrically connected to the other end of the analysis target layer in the element, and an analyzer that acquires quantitative data related to a defect in the analysis target layer on the basis of the current value in which, in a first mode, a plurality of areas of the analysis target layer are sequentially irradiated with the light.