Patents by Inventor Junichi Okayasu

Junichi Okayasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8466566
    Abstract: It is an objective to provide a semiconductor device with low leak current. The semiconductor device includes a plurality of ground side electrodes and a plurality of signal side electrodes arranged on a semiconductor substrate in an alternating manner; a plurality of control electrodes arranged respectively between each pair of a ground side electrode and a signal side electrode; a ground side electrode connecting section that connects the ground side electrodes to each other; a signal side electrode connecting section that connects the signal side electrodes to each other; and ground side lead wiring and signal side lead wiring that extend respectively from a region near one end and a region near another end of an arranged electrode section, in which the ground side electrodes and the signal side electrodes are arranged in an arrangement direction, away from the arranged electrode group in the arrangement direction.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: June 18, 2013
    Assignee: Advantest Corporation
    Inventors: Makoto Nakanishi, Tomoo Yamanouchi, Junichi Okayasu, Taku Sato, Daiju Terasawa, Masahiko Takikawa
  • Publication number: 20120074577
    Abstract: It is an objective to provide a semiconductor device with low leak current. The semiconductor device includes a plurality of ground side electrodes and a plurality of signal side electrodes arranged on a semiconductor substrate in an alternating manner; a plurality of control electrodes arranged respectively between each pair of a ground side electrode and a signal side electrode; a ground side electrode connecting section that connects the ground side electrodes to each other; a signal side electrode connecting section that connects the signal side electrodes to each other; and ground side lead wiring and signal side lead wiring that extend respectively from a region near one end and a region near another end of an arranged electrode section, in which the ground side electrodes and the signal side electrodes are arranged in an arrangement direction, away from the arranged electrode group in the arrangement direction.
    Type: Application
    Filed: April 1, 2011
    Publication date: March 29, 2012
    Applicant: ADVANTEST CORPORATION
    Inventors: Makoto Nakanishi, Tomoo Yamanouchi, Junichi Okayasu, Taku Sato, Daiju Terasawa, Masahiko Takikawa
  • Publication number: 20090001422
    Abstract: There is provided a manufacturing method of a semiconductor apparatus, including forming an InGaP layer on a substrate, forming a gate electrode having a Ti layer and an Au layer by vapor deposition on an upper surface of the InGaP layer, further forming a GaAs layer on the upper surface of the InGaP layer in a region different from a region in which the gate electrode is formed, and further forming a source electrode and a drain electrode on an upper surface of the GaAs layer. When the gate electrode having the Ti and Au layers is formed on the upper surface of the InGaP layer, the Ti and Au layers are formed with a substrate temperature being set equal to or lower than 180° C.
    Type: Application
    Filed: October 19, 2007
    Publication date: January 1, 2009
    Applicant: ADVANTEST CORPORATION
    Inventors: Junichi OKAYASU, Takuya OIZUMI
  • Patent number: 6636187
    Abstract: A display has a panel, and first and second electrodes. The first and second electrodes define a matrix of cells on the panel. The second electrodes, which correspond to lines of the cells, are scanned to select the cell lines one by one. The first electrodes are driven to set display data for a selected one of the cell lines. The display also has a sequence setting unit for setting sequences of scanning the second electrodes, and a sequence selection unit for selecting one of the sequences that minimizes the current and power consumption of a first-electrode driver without deteriorating the quality of the displayed images.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: October 21, 2003
    Assignee: Fujitsu Limited
    Inventors: Masaya Tajima, Junichi Okayasu, Kiyoshi Takata, Katsuhiro Ishida, Takashi Fujisaki, Yoshimasa Awata, Nobuyoshi Kondo, Shinsuke Tanaka, Naoki Matsui, Fumitaka Asami
  • Publication number: 20010040536
    Abstract: A display has a panel, and first and second electrodes. The first and second electrodes define a matrix of cells on the panel. The second electrodes, which correspond to lines of the cells, are scanned to select the cell lines one by one. The first electrodes are driven to set display data for a selected one of the cell lines. The display also has a sequence setting unit for setting sequences of scanning the second electrodes, and a sequence selection unit for selecting one of the sequences that minimizes the current and power consumption of a first-electrode driver without deteriorating the quality of the displayed images.
    Type: Application
    Filed: October 29, 1998
    Publication date: November 15, 2001
    Inventors: MASAYA TAJIMA, JUNICHI OKAYASU, KIYOSHI TAKATA, KATSUHIRO ISHIDA, TAKASHI FUJISAKI, YOSHIMASA AWATA, NOBUYOSHI KONDO, SHINSUKE TANAKA, NAOKI MATSUI, FUMITAKA ASAMI
  • Patent number: 6144349
    Abstract: The present invention relates to a plasma display device which limits a generation of electromagnetic wave. The plasma display device has first and second drive circuits for applying a drive voltage to first and second display electrode pair. Further, a direction of a charge current flowing at said first display electrode pair when said drive voltage is applied by said first drive circuit is opposite on said plasma display panel to a direction of a charge current flowing at said second display electrode pair when said drive voltage is applied by said second drive circuit. According to the present invention, a transitional charge/discharge current, which is generated upon the application of a drive voltage to one of the display electrodes, and a light emission discharge current flow in opposite directions on the panel. Thus, electromagnetic waves that are generated by the inductances of the display electrode pair cancel each other out.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: November 7, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshimasa Awata, Naoki Matsui, Kenji Awamoto, Yoshikazu Kanazawa, Shigetoshi Tomio, Fumitaka Asami, Masaya Tajima, Hideki Isohata, Junichi Okayasu, Kiyoshi Takata, Takashi Fujisaki