Abstract: An example energy efficiency management method includes detecting a type of sensitivity to a performance requirement of a service running in a device, selecting a part of a plurality of running parameters of the device based on the type of sensitivity, where the selected running parameter is a running parameter with low relevance to the type of sensitivity of the service, and then adjusting the selected part of the plurality of running parameters or an associated parameter associated with the selected part of the plurality of running parameters so that a corresponding resource that is in the device and that is occupied by the service is reduced. Power consumption of the device after the adjustment is lower than power consumption of the device before the adjustment.

Abstract: Disclosed is an circuit for preventing latch-up, comprising a first transistor, a second transistor of a type opposite to that of the first transistor, and a control circuit, wherein a control terminal of the first transistor receives a first control voltage and a first terminal of the first transistor receives a first supply voltage; a control terminal of the second transistor receives a second control voltage, and is connected to a second terminal of the first transistor; a first terminal of the second transistor is connected to the control terminal of the first transistor, and a second terminal of the second transistor receives a second supply voltage. The control circuit is coupled on a path formed by the first transistor and the second transistor between the first supply voltage and the second supply voltage for disconnecting the path when the first control voltage and/or the second control voltage is out of a predetermined range.

Abstract: A lithium-containing material is white powder. The lithium-containing material contains components of lithium (Li), aluminum (Al), phosphorus (P), fluorine (F) and oxygen (O) elements. The contents of the elements in mass ratio are as follows: the content of the lithium element is greater than 0% and less than or equal to 12%, the content of the aluminum element is 5%-40%, the content of the phosphorus element is 1%-35%, the content of the fluorine element is 0.4%-22%, and the content of the oxygen element is 2%-34%. The lithium-containing material is used as an electrode additive material or diaphragm coating material of a lithium-ion battery.

Abstract: Embodiments regarding use of distributed machine learning in wireless communication systems are described. In one embodiment, quantity information of training samples used by a user equipment during a current training of a local model is sent to a control entity; uplink-resource information for uploading parameters of the local model is received, where an uplink resource indicated by the uplink-resource information is allocated by the control entity based on quantity information coming from multiple user equipments, so that a user equipment with a larger quantity indicated by the quantity information has a greater chance of being allocated with an uplink resource sufficient to upload the parameters of the local model; and the parameters of the local model are uploaded to the control entity via the uplink resource indicated by the uplink-resource information, to cause the control entity to obtain a next global model.

Abstract: The present invention discloses an integrated photonic chip structure for universal quantum walk simulation which combines the multiphoton source that can generate the spatially entangled multi-photon state and the linear optical network that can implement the unitary transformation, and establishes mapping between on-chip spatial-entangled multi-photon state and quantum walk state and mapping between on-chip linear optical unitary transformation and the evolution process of multi-particle quantum walk. By manipulating the spatially entangled multi-photon state generated via the multi-photon sources and the optical unitary transformation implemented via the universal linear optical networks, the chip structure can implement universal quantum walk simulation with the control over all parameters of multiple-particle quantum walks including such as evolution Hamiltonian, evolution time, initial evolution state and particle properties (i.e., particle indistinguishability and particle exchange symmetry).

Abstract: The present invention discloses a method for calibrating controllable phase shifters in a multi-stage staggered Mach-Zehnder interferometer structure on an optical chip, aiming to solve the problem of calibrating the controllable phase shifters in a configurable optical network of the multi-stage staggered Mach-Zehnder interferometers. The technical solution is to calibrate the controllable phase shifters that can be calibrated in the optical network; and then to constitute calibration conditions for and calibrate inner phase shifters that has not been; and finally to constitute calibration conditions for and calibrate outer phase shifters that is not calibrated.

Abstract: The present invention relates to a method for measuring the ion nonextensive parameter of plasma includes the following steps: describe the plasma with nonextensive statistical mechanics, obtain the equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma; collect the measurement data of the geodesic acoustic mode frequencies and plasma temperature in the device where the plasma is to be measured; the obtained equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma is used to linearly fit the collected measured data of the geodesic acoustic mode frequency and the plasma temperature in the device where the plasma is to be measured to obtain the slope value; based on the derived equation and the obtained slope values, and combining with the safety factor of the device where the plasma is to be measured, the ion nonextensive parameter is solved numerically.

Abstract: This application discloses a gesture recognition method and apparatus accurately recognizes a gesture of a user and improves user experience. The method includes: obtaining echo data of a radar, where the echo data includes information generated when an object moves in a detection range of the radar; filtering out, from the echo data, information that does not meet a preset condition, to obtain gesture data, where the preset condition includes at least two of a distance, a speed, or an angle, the distance includes a distance between the object and the radar, the speed includes a speed of the object relative to the radar, and the angle includes an azimuth or a pitch angle of the object in the detection range of the radar; extracting a feature from the gesture data, to obtain gesture feature information; and obtaining a target gesture based on the gesture feature information.

Abstract: The present invention relates to a method for measuring the ion nonextensive parameter of plasma includes the following steps: describe the plasma with nonextensive statistical mechanics, obtain the equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma; collect the measurement data of the geodesic acoustic mode frequencies and plasma temperature in the device where the plasma is to be measured; the obtained equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma is used to linearly fit the collected measured data of the geodesic acoustic mode frequency and the plasma temperature in the device where the plasma is to be measured to obtain the slope value; based on the derived equation and the obtained slope values, and combining with the safety factor of the device where the plasma is to be measured, the ion nonextensive parameter is solved numerically.

Abstract: Disclosed is an circuit for preventing latch-up, comprising a first transistor, a second transistor of a type opposite to that of the first transistor, and a control circuit, wherein a control terminal of the first transistor receives a first control voltage and a first terminal of the first transistor receives a first supply voltage; a control terminal of the second transistor receives a second control voltage, and is connected to a second terminal of the first transistor; a first terminal of the second transistor is connected to the control terminal of the first transistor, and a second terminal of the second transistor receives a second supply voltage. The control circuit is coupled on a path formed by the first transistor and the second transistor between the first supply voltage and the second supply voltage for disconnecting the path when the first control voltage and/or the second control voltage is out of a predetermined range.

Abstract: The disclosure provides a display panel, a manufacturing method thereof, and a display device. A display area is defined on a surface of the display panel, and a first electricity supply area and a second electricity supply area are disposed opposite to each other at two sides of the display area. The display panel includes a substrate layer, and a first metal layer and a second metal layer which are sequentially disposed on the substrate layer, and an insulating layer is further disposed between the first metal layer and the second metal layer in the display area.

Abstract: A display panel and a method of manufacturing the display panel are provided. The display panel includes an array substrate, a pixel definition layer, and spacers. Each of spacers includes a bottom surface and a top surface. A cross-sectional area of the top surface is less than a cross-sectional area of the bottom surface. A horizontal distance from a center to a side of the spacer gradually increases from the top surface to the bottom surface. Moreover, holes of the mask plate corresponding to positions of the spacers are defined, which ensures accuracy of photolithography and display effect of the display panel.

Abstract: The disclosure provides a display panel, a manufacturing method thereof, and a display device. A display area is defined on a surface of the display panel, and a first electricity supply area and a second electricity supply area are disposed opposite to each other at two sides of the display area. The display panel includes a substrate layer, and a first metal layer and a second metal layer which are sequentially disposed on the substrate layer, and an insulating layer is further disposed between the first metal layer and the second metal layer in the display area.

Abstract: A display panel and a method of manufacturing the display panel are provided. The display panel includes an array substrate, a pixel definition layer, and spacers. Each of spacers includes a bottom surface and a top surface. A cross-sectional area of the top surface is less than a cross-sectional area of the bottom surface. A horizontal distance from a center to a side of the spacer gradually increases from the top surface to the bottom surface. Moreover, holes of the mask plate corresponding to positions of the spacers are defined, which ensures accuracy of photolithography and display effect of the display panel.

Abstract: The present invention provides a display panel including a base substrate, a plurality of pixel units, and a power signal structure. A display area of the display panel includes a lower display area, a middle display area, and an upper display area. The power signal structure includes a VDD power cable, a plurality of VDD signal lines, and a VDD lead-in portion. The VDD lead-in portion is electrically connected to each of the VDD signal lines through holes provided in an insulated layer in the middle display area. Therefore, the VDD power signals provided by a driving chip are introduced from the middle display area, and then transmitted from the middle display area to each of the pixel units by the VDD signal lines, which can effectively reduce the VDD voltage drop in an organic light emitting diode (OLED) panel, thereby significantly improving brightness uniformity of the OLED panel.

Abstract: The present invention discloses an integrated photonic chip structure for universal quantum walk simulation which combines the multiphoton source that can generate the spatially entangled multi-photon state and the linear optical network that can implement the unitary transformation, and establishes mapping between on-chip spatial-entangled multi-photon state and quantum walk state and mapping between on-chip linear optical unitary transformation and the evolution process of multi-particle quantum walk. By manipulating the spatially entangled multi-photon state generated via the multi-photon sources and the optical unitary transformation implemented via the universal linear optical networks, the chip structure can implement universal quantum walk simulation with the control over all parameters of multiple-particle quantum walks including such as evolution Hamiltonian, evolution time, initial evolution state and particle properties (i.e., particle indistinguishability and particle exchange symmetry).

Abstract: Reconfigurable nonlinear frequency conversion waveguide chip based on Mach-Zehnder interferometer coupled micro-ring, the method is based on the integration of waveguide components of phase-adjustable Mach-Zehnder interferometers (MZI) and micro-ring resonators. The chip is illustrated by FIG. 1. The MZI couples light and photons into and output of the micro-ring resonator and controls the micorings' quality factor thus optimize the nonlinear frequency conversion processes inside the ring by the phase-modulator inside the MZI. The micro-ring resonator enables the nonlinear optical generation of new frequency light beams and quantum light sources based on the second-order or third-order nonlinear optical process. Other optical waveguide components in region I and III of FIG. 1 are linear optical circuits for power splitting of pump beams and post-process of generated light beams or photons.

Abstract: The present invention provides a display panel including a base substrate, a plurality of pixel units, and a power signal structure. A display area of the display panel includes a lower display area, a middle display area, and an upper display area. The power signal structure includes a VDD power cable, a plurality of VDD signal lines, and a VDD lead-in portion. The VDD lead-in portion is electrically connected to each of the VDD signal lines through holes provided in an insulated layer in the middle display area. Therefore, the VDD power signals provided by a driving chip are introduced from the middle display area, and then transmitted from the middle display area to each of the pixel units by the VDD signal lines, which can effectively reduce the VDD voltage drop in an organic light emitting diode (OLED) panel, thereby significantly improving brightness uniformity of the OLED panel.

Abstract: The present invention provides a display panel, a manufacturing method thereof, and a display module. The display panel includes a light emitting device. The light emitting device includes an anode electrode layer, a cathode electrode layer, and at least two light emitting layers, and at least one auxiliary electrode layer. The at least two light emitting layers are disposed between the anode electrode layer and the cathode electrode layer. Each auxiliary electrode layer is disposed between two adjacent light emitting layers. The at least one auxiliary electrode layer, the anode electrode layer, and the cathode electrode layer are separated from each other. The light emitting layers are separated from each other.

Abstract: The present invention discloses a method for calibrating controllable phase shifters in a multi-stage staggered Mach-Zehnder interferometer structure on an optical chip, aiming to solve the problem of calibrating the controllable phase shifters in a configurable optical network of the multi-stage staggered Mach-Zehnder interferometers. The technical solution is to calibrate the controllable phase shifters that can be calibrated in the optical network; and then to constitute calibration conditions for and calibrate inner phase shifters that has not been; and finally to constitute calibration conditions for and calibrate outer phase shifters that is not calibrated.