Patents by Inventor Jun Kameya
Jun Kameya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8976918Abstract: A wireless communication device includes a reception processing circuit including a weight coefficient computation circuit that includes a computation circuit to compute a weight coefficient which is used for removing a distortion of a reception signal caused by a multi-path, and which of each of fingers corresponds to each of a specified number of paths among a plurality of paths caused by the multi-path between the device and the opposing device, by iteratively performing a computation including a complex multiplication between a weight coefficient while being iteratively computed and a component of a correlation matrix, and a control circuit to cause the computation circuit to compute complex multiplications between a first (second) component of a pair of components having a complex conjugate relationship and a first (second) weight coefficient while being iteratively computed when the pair of components is present among components used for computing the weight coefficient.Type: GrantFiled: May 23, 2014Date of Patent: March 10, 2015Assignee: Fujitsu LimitedInventor: Jun Kameya
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Patent number: 8909686Abstract: A discrete Fourier calculation device includes a twiddle factor table storage unit that stores therein a twiddle factor table that associates twiddle factors with phases of the corresponding twiddle factors; a correction value specifying unit that specifies first and second correction values for correcting a phase of an input signal in accordance with an amplitude of the input signal; a generating unit that corrects the phase of the input signal by using the specified first and second correction values to generate first and second phases; an addition unit that adds an arbitrary phase corresponding to an arbitrary twiddle factor stored in the twiddle factor table, to each of the generated first and second phases; and a rotation calculation unit that acquires, from the twiddle factor table, first and second twiddle factors corresponding to the first and second phases and sums the acquired first and second twiddle factors.Type: GrantFiled: June 27, 2012Date of Patent: December 9, 2014Assignee: Fujitsu LimitedInventor: Jun Kameya
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Publication number: 20140355660Abstract: A wireless communication device includes a reception processing circuit including a weight coefficient computation circuit that includes a computation circuit to compute a weight coefficient which is used for removing a distortion of a reception signal caused by a multi-path, and which of each of fingers corresponds to each of a specified number of paths among a plurality of paths caused by the multi-path between the device and the opposing device, by iteratively performing a computation including a complex multiplication between a weight coefficient while being iteratively computed and a component of a correlation matrix, and a control circuit to cause the computation circuit to compute complex multiplications between a first (second) component of a pair of components having a complex conjugate relationship and a first (second) weight coefficient while being iteratively computed when the pair of components is present among components used for computing the weight coefficient.Type: ApplicationFiled: May 23, 2014Publication date: December 4, 2014Applicant: FUJITSU LIMITEDInventor: Jun Kameya
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Publication number: 20130039165Abstract: A discrete Fourier calculation device includes a twiddle factor table storage unit that stores therein a twiddle factor table that associates twiddle factors with phases of the corresponding twiddle factors; a correction value specifying unit that specifies first and second correction values for correcting a phase of an input signal in accordance with an amplitude of the input signal; a generating unit that corrects the phase of the input signal by using the specified first and second correction values to generate first and second phases; an addition unit that adds an arbitrary phase corresponding to an arbitrary twiddle factor stored in the twiddle factor table, to each of the generated first and second phases; and a rotation calculation unit that acquires, from the twiddle factor table, first and second twiddle factors corresponding to the first and second phases and sums the acquired first and second twiddle factors.Type: ApplicationFiled: June 27, 2012Publication date: February 14, 2013Applicant: FUJITSU LIMITEDInventor: Jun KAMEYA
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Publication number: 20130039439Abstract: A multicarrier transmitting apparatus includes a subcarrier mapping unit, an IFFT unit, and a signal transformation value separation unit. When the subcarrier mapping unit transmits first reference signals and second reference signals continuous in the time axis direction, the subcarrier mapping unit outputs a multicarrier signal in which the first reference signals and the second reference signals are allocated to subcarriers continuous in the frequency axis direction. The IFFT unit performs an inverse Fourier transformation on the multicarrier signal output from the subcarrier mapping unit to output signal transformation values in the time axis direction. The signal transformation value separation unit separates the signal transformation values output from the IFFT unit into signal transformation values associated with subcarriers to which the first reference signals are allocated and signal transformation values associated with the subcarriers to which the second reference signal are allocated.Type: ApplicationFiled: June 27, 2012Publication date: February 14, 2013Applicant: FUJITSU LIMITEDInventor: Jun KAMEYA
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Patent number: 8290076Abstract: A receiver for receiving a signal including a series of symbols, the signal being performed Time Window processing at portions including a boundary of adjacent symbols by a transmitter so as to eliminate a discontinuity between the symbols, the receiver includes: a receiving unit that receives the signal; and a processor extracts the series of symbols and performing an inverse processing of the Time Window processing at the portions performed the Time Window processing by the transmitter.Type: GrantFiled: June 22, 2010Date of Patent: October 16, 2012Assignee: Fujitsu LimitedInventor: Jun Kameya
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Publication number: 20120220253Abstract: A wireless communications apparatus includes a setup-value storage storing therein setup information that includes a compensation coefficient that is used in frequency-characteristic compensation of a subcarrier signal that results from separating frequency components from a multicarrier modulated signal, an operation category indicating the type of handling of the compensation coefficient, and a category condition; a subcarrier-signal input unit that receives input of the subcarrier signal; an address generator that in conjunction with the input timing of the subcarrier signal, generates an address that corresponds to the subcarrier signal; an operation category selector that determines a category condition that the generated address satisfies, and selects the operation category that corresponds to the category condition; frequency-characteristic compensating unit uses the compensation coefficient that corresponds to the selected operation category and performs the frequency-characteristic compensation on thType: ApplicationFiled: November 11, 2011Publication date: August 30, 2012Applicant: FUJITSU LIMITEDInventor: Jun Kameya
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Publication number: 20110122938Abstract: A communication device including: mapping frequency domain signals including phase information onto, of a band of subcarriers for transmitting the frequency domain signals, a band in which a twiddle factor for shifting the band of the subcarriers to a specified band is an integer power of an imaginary unit; performing inverse fast fourier transform on the subcarriers on which the frequency domain signals are mapped, to transform the subcarriers into time domain signals; increasing the number of samples by up-sampling the time domain signals; and executing, when the twiddle factor is an integer power of the imaginary unit, interchange processing for interchanging a real number component and an imaginary number component of each of the samples up-sampled or sign-reversal processing for reversing a sign of the real number component or the imaginary number component to shift the band of the frequency-domain-mapped subcarriers to the specified band.Type: ApplicationFiled: November 23, 2010Publication date: May 26, 2011Applicant: FUJITSU LIMITEDInventor: Jun KAMEYA
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Publication number: 20100329373Abstract: A receiver for receiving a signal including a series of symbols, the signal being performed Time Window processing at portions including a boundary of adjacent symbols by a transmitter so as to eliminate a discontinuity between the symbols, the receiver includes: a receiving unit that receives the signal; and a processor extracts the series of symbols and performing an inverse processing of the Time Window processing at the portions performed the Time Window processing by the transmitter.Type: ApplicationFiled: June 22, 2010Publication date: December 30, 2010Applicant: FUJITSU LIMITEDInventor: Jun Kameya
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Publication number: 20100166106Abstract: An arithmetic processing apparatus includes a shift section configured to shift, by (N+1)/2 bit data, a data signal x(n) (n=0, . . . , N?1), which has a data length of N, where N is an odd number, and which has left-right symmetry with respect to ((N?1)/2)th bit data, so as to obtain a data signal x?(n), and an arithmetic operation section configured to obtain a data signal X(k) (k=0, . . . , N?1) by performing a discrete Fourier transform operation on the data signal x?(n).Type: ApplicationFiled: December 23, 2009Publication date: July 1, 2010Applicant: FUJITSU LIMITEDInventor: Jun KAMEYA