Patents by Inventor Jun KAMIOKA
Jun KAMIOKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260135524Abstract: A balance-type amplifier includes: a signal divider circuit to divide an amplification target signal into first and second signals and output them; a first amplifier to amplify the first signal; a second amplifier to amplify the second signal; and a synthesis circuit to synthesize the amplified first signal and the amplified second signal. The first amplifier includes a first matching circuit to match an output impedance of the first amplifier with a first impedance different from an impedance of a load connected with an output side of the synthesis circuit. The second amplifier of the balance-type amplifier includes a second matching circuit to match an output impedance of the second amplifier with a second impedance different from the impedance of the load. One of the first and second impedances is higher than the impedance of the load, and another of them is lower than the impedance of the load.Type: ApplicationFiled: November 21, 2025Publication date: May 14, 2026Applicant: Mitsubishi Electric CorporationInventors: Keigo NAKATANI, Kento SAIKI, Jun KAMIOKA
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Patent number: 12456954Abstract: A high-frequency amplifier includes: a common-source transistor that has gate fingers, drain fingers, and source fingers, amplifies a signal applied to each of the gate fingers as a signal to be amplified, and outputs an amplified signal from each of the drain fingers; a common-gate transistor that has source fingers connected to the drain fingers of the common-source transistor, drain fingers, and gate fingers, and amplifies the amplified signal output from each of the drain fingers of the common-source transistor; a gate bus bar connected to the gate fingers of the common-gate transistor; and capacitors each having a first end connected to the gate bus bar and a second end grounded: wherein the capacitors are arranged at respective positions where impedances obtained by looking toward the respective capacitors from the respective gate fingers of the common-gate transistor are equal to each other.Type: GrantFiled: August 5, 2022Date of Patent: October 28, 2025Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Jun Kamioka, Shintaro Shinjo
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Patent number: 12449461Abstract: A charge sensor according to the present disclosed technology includes a quantum dot to have a first end connected to an input terminal via a first tunnel junction and a second end connected to an output terminal via a second tunnel junction, and an inductor connected in parallel to the quantum dot.Type: GrantFiled: September 25, 2023Date of Patent: October 21, 2025Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Jun Kamioka, Koji Yamanaka
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Publication number: 20250055426Abstract: Disclosed is a feedback amplifier including: an amplification transistor having a source terminal grounded; a first feedback circuit to provide negative feedback between the gate and drain terminals of the amplification transistor; a second feedback circuit to provide positive feedback between the gate and drain terminals via the first feedback circuit; and a third feedback circuit to adjust the stability factor of the feedback amplifier in a high frequency range outside a used frequency band.Type: ApplicationFiled: October 25, 2024Publication date: February 13, 2025Applicant: Mitsubishi Electric CorporationInventors: Ken KUDARA, Jun KAMIOKA
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Publication number: 20240012041Abstract: A charge sensor according to the present disclosed technology includes a quantum dot to have a first end connected to an input terminal via a first tunnel junction and a second end connected to an output terminal via a second tunnel junction, and an inductor connected in parallel to the quantum dot.Type: ApplicationFiled: September 25, 2023Publication date: January 11, 2024Applicant: Mitsubishi Electric CorporationInventors: Jun KAMIOKA, Koji YAMANAKA
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Patent number: 11621674Abstract: A high-efficiency amplifier is configured so that short stubs are provided in a line between a first substrate end and a second substrate end of a substrate, and among the short stubs, short stubs provided at locations other than both ends of the line include two short stubs and which are adjacent to each other, and which are provided at locations at which the two short stubs are to be electromagnetically coupled to each other.Type: GrantFiled: November 10, 2020Date of Patent: April 4, 2023Assignee: Mitsubishi Electric CorporationInventors: Eigo Kuwata, Makoto Kimura, Jun Kamioka
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Patent number: 11595012Abstract: CRLH lines including left-handed shunt inductors and left-handed series capacitors are provided on gate side transmission lines of a plurality of FETs.Type: GrantFiled: September 28, 2020Date of Patent: February 28, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Jun Kamioka, Masatake Hangai, Koji Yamanaka
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Publication number: 20220385246Abstract: A high-frequency amplifier includes: a common-source transistor that has gate fingers, drain fingers, and source fingers, amplifies a signal applied to each of the gate fingers as a signal to be amplified, and outputs an amplified signal from each of the drain fingers; a common-gate transistor that has source fingers connected to the drain fingers of the common-source transistor, drain fingers, and gate fingers, and amplifies the amplified signal output from each of the drain fingers of the common-source transistor; a gate bus bar connected to the gate fingers of the common-gate transistor; and capacitors each having a first end connected to the gate bus bar and a second end grounded: wherein the capacitors are arranged at respective positions where impedances obtained by looking toward the respective capacitors from the respective gate fingers of the common-gate transistor are equal to each other.Type: ApplicationFiled: August 5, 2022Publication date: December 1, 2022Applicant: Mitsubishi Electric CorporationInventors: Jun KAMIOKA, Shintaro SHINJO
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Publication number: 20210075375Abstract: A high-efficiency amplifier is configured so that short stubs are provided in a line between a first substrate end and a second substrate end of a substrate, and among the short stubs, short stubs provided at locations other than both ends of the line include two short stubs and which are adjacent to each other, and which are provided at locations at which the two short stubs are to be electromagnetically coupled to each other.Type: ApplicationFiled: November 10, 2020Publication date: March 11, 2021Applicant: Mitsubishi Electric CorporationInventors: Eigo KUWATA, Makoto KIMURA, Jun KAMIOKA
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Publication number: 20210013854Abstract: CRLH lines including left-handed shunt inductors and left-handed series capacitors are provided on gate side transmission lines of a plurality of FETs.Type: ApplicationFiled: September 28, 2020Publication date: January 14, 2021Applicant: Mitsubishi Electric CorporationInventors: Jun KAMIOKA, Masatake HANGAI, Koji YAMANAKA
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Patent number: 10604086Abstract: A decoration member includes a base member having a design surface, and a film material that covers the design surface, wherein the base member has an edge portion that sharpens toward a tip portion when seen in a normal direction of the design surface, and a paste wall section on which the film material is able to be pasted while protruding away from the design surface is formed on a surface of the edge portion opposite to the design surface.Type: GrantFiled: July 12, 2018Date of Patent: March 31, 2020Assignees: Honda Lock Mfg. Co., Ltd., Honda Motor Co., Ltd.Inventors: Hiroyuki Kozuma, Naoki Okada, Minoru Shibutani, Jun Kamioka, Hidenobu Yasuda, Yuta Orikasa
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Publication number: 20190016278Abstract: A decoration member includes a base member having a design surface, and a film material that covers the design surface, wherein the base member has an edge portion that sharpens toward a tip portion when seen in a normal direction of the design surface, and a paste wall section on which the film material is able to be pasted while protruding away from the design surface is formed on a surface of the edge portion opposite to the design surface.Type: ApplicationFiled: July 12, 2018Publication date: January 17, 2019Inventors: Hiroyuki KOZUMA, Naoki OKADA, Minoru SHIBUTANI, Jun KAMIOKA, Hidenobu YASUDA, Yuta ORIKASA