Patents by Inventor Jun-keun Kwak

Jun-keun Kwak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100029072
    Abstract: Methods of forming integrated circuit devices include forming an electrically insulating layer having a contact hole therein, on a substrate, and then depositing an electrically insulating liner onto a sidewall of the contact hole using an atomic layer deposition (ALD) technique. This electrically insulating liner, which may include gelatinous silica or silicon dioxide, for example, may be deposited to a thickness in a range from 40 ? to 100 ?. A portion of the electrically insulating liner is then removed from a bottom of the contact hole and a barrier metal layer is then formed on the electrically insulating liner and on a bottom of the contact hole. The step of forming the barrier metal layer may be followed by filling the contact hole with a metal interconnect.
    Type: Application
    Filed: July 23, 2009
    Publication date: February 4, 2010
    Inventors: Jae-Eon Park, Jun-Keun Kwak, Jin-Woo Choi, Sunfei Fang, Jiang Yan
  • Patent number: 7622386
    Abstract: A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at an initial degas temperature of about 250 to about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a nickel containing layer over the wafer following transfer of the wafer from the degas chamber to the deposition chamber, and annealing the semiconductor wafer so as to create silicide regions at portions on the wafer where nickel material is formed over silicon.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: November 24, 2009
    Assignees: International Business Machines Corporation, Samsung Electronics Co., Ltd.
    Inventors: Anita Madan, Robert J. Purtell, Keith Kwong Hon Wong, Jun-Keun Kwak
  • Publication number: 20080311711
    Abstract: A method of making a semiconductor interconnect is disclosed. A semiconductor body on which a transistor comprising a doped region is formed is provided. A dielectric region is formed over the doped region, and a contact hole is formed in the dielectric to expose the doped region. The contact hole is cleaned and a first layer of metal is formed over a bottom and sidewalls of the contact hole. The first layer of metal is thinned so that the thickness of the first layer of metal on the sidewalls is made more uniform. A barrier is formed over the first layer of metal and the contact hole is filled with conductive material.
    Type: Application
    Filed: June 13, 2007
    Publication date: December 18, 2008
    Inventors: Roland Hampp, Jun-Keun Kwak, Keith Kwong Hon Wong
  • Publication number: 20080138985
    Abstract: A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at an initial degas temperature of about 250 to about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a nickel containing layer over the wafer following transfer of the wafer from the degas chamber to the deposition chamber, and annealing the semiconductor wafer so as to create silicide regions at portions on the wafer where nickel material is formed over silicon.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 12, 2008
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Anita Madan, Robert J. Purtell, Keith Kwong Hon Wong, Jun-Keun Kwak
  • Patent number: 7235485
    Abstract: Provided is a method of manufacturing a semiconductor device with enhanced electrical characteristics. The method includes disposing a substrate on a substrate support in a process chamber, pre-heating the substrate on the substrate support adjusted to a temperature from 300 to 400° C. for 60 seconds or more, forming a silicon protective layer on the substrate by supplying a silicon source gas into the process chamber and heating the substrate on the substrate support adjusted to a temperature from 300 to 400° C. for 10 seconds or more, and forming a tungsten layer on the silicon protective layer.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: June 26, 2007
    Assignees: Samsung Electronics Co., Ltd., Infineon Technology North America Corp.
    Inventors: Jun-keun Kwak, Roland Hampp
  • Publication number: 20070087560
    Abstract: Provided is a method of manufacturing a semiconductor device with enhanced electrical characteristics. The method includes disposing a substrate on a substrate support in a process chamber, pre-heating the substrate on the substrate support adjusted to a temperature from 300 to 400° C. for 60 seconds or more, forming a silicon protective layer on the substrate by supplying a silicon source gas into the process chamber and heating the substrate on the substrate support adjusted to a temperature from 300 to 400° C. for 10 seconds or more, and forming a tungsten layer on the silicon protective layer.
    Type: Application
    Filed: October 14, 2005
    Publication date: April 19, 2007
    Inventors: Jun-keun Kwak, Roland Hampp