Patents by Inventor Jun Kishimoto

Jun Kishimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6656818
    Abstract: Provided is a manufacturing process for a semiconductor wafer according to which semiconductor wafers each with higher flatness can be manufactured with good efficiency from a wafer work having passed through a surface grinding step by enabling restriction of reduction in flatness in the vicinity of the center and in the outer peripheral edge portion of a surface ground wafer at the lowest level possible, and correction of the reduction in flatness of both portions with ease to planarize in a planarization or polishing step. When a semiconductor wafer fixed on a chuck table is surface ground using a cup shaped grinding wheel, the semiconductor wafer is ground toward the center thereof such that the grinding wheel cuts into the semiconductor wafer at the outer peripheral edge thereof and moves away from the semiconductor wafer at the central portion thereof and the ground semiconductor wafer is planarized according to a PACE method.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: December 2, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Jun Kishimoto
  • Publication number: 20020037650
    Abstract: There is disclosed a semiconductor wafer obtained, at least, by removing a mechanical damage layer by etching both surfaces of the wafer, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer, and a method for fabricating it. There can be provided a method for fabricating a semiconductor wafer wherein grinding striations which remain on a semiconductor wafer even when double side polishing and finishing mirror-polishing are conducted after a conventional step of surface-grinding of the front surface or the both surfaces, are eliminated to improve quality of the front surface of the wafer, and the back surface having a quality suitable for the device process can be obtained, and a semiconductor wafer obtained thereby.
    Type: Application
    Filed: November 14, 2001
    Publication date: March 28, 2002
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Jun Kishimoto
  • Patent number: 6352927
    Abstract: There is disclosed a semiconductor wafer obtained, at least, by removing a mechanical damage layer by etching both surfaces of the wafer, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer, and a method for fabricating it. There can be provided a method for fabricating a semiconductor wafer wherein grinding striations which remain on a semiconductor wafer even when double side polishing and finishing mirror-polishing are conducted after a conventional step of surface-grinding of the front surface or the both surfaces, are eliminated to improve quality of the front surface of the wafer, and the back surface having a quality suitable for the device process can be obtained, and a semiconductor wafer obtained thereby.
    Type: Grant
    Filed: November 22, 1999
    Date of Patent: March 5, 2002
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Jun Kishimoto
  • Publication number: 20010039119
    Abstract: There is disclosed a semiconductor wafer obtained, at least, by removing a mechanical damage layer by etching both surfaces of the wafer, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer, and a method for fabricating it. There can be provided a method for fabricating a semiconductor wafer wherein grinding striations which remain on a semiconductor wafer even when double side polishing and finishing mirror-polishing are conducted after a conventional step of surface-grinding of the front surface or the both surfaces, are eliminated to improve quality of the front surface of the wafer, and the back surface having a quality suitable for the device process can be obtained, and a semiconductor wafer obtained thereby.
    Type: Application
    Filed: November 22, 1999
    Publication date: November 8, 2001
    Inventor: JUN KISHIMOTO