Patents by Inventor Jun Koyama

Jun Koyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200342915
    Abstract: An object of one embodiment of the present invention is to propose a memory device in which a period in which data is held is ensured and memory capacity per unit area can be increased. In the memory device of one embodiment of the present invention, bit lines are divided into groups, and word lines are also divided into groups. The word lines assigned to one group are connected to the memory cell connected to the bit lines assigned to the one group. Further, the driving of each group of bit lines is controlled by a dedicated bit line driver circuit of a plurality of bit line driver circuits. In addition, cell arrays are formed on a driver circuit including the above plurality of bit line driver circuits and a word line driver circuit. The driver circuit and the cell arrays overlap each other.
    Type: Application
    Filed: May 22, 2020
    Publication date: October 29, 2020
    Inventors: Jun KOYAMA, Shunpei YAMAZAKI
  • Publication number: 20200335628
    Abstract: A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.
    Type: Application
    Filed: July 2, 2020
    Publication date: October 22, 2020
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Masashi TSUBUKU, Kosei NODA
  • Patent number: 10811417
    Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: October 20, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Publication number: 20200321362
    Abstract: A semiconductor device including a capacitor whose charge capacity is increased while improving the aperture ratio is provided. Further, a semiconductor device which consumes less power is provided. A transistor which includes a light-transmitting semiconductor film, a capacitor in which a dielectric film is provided between a pair of electrodes, an insulating film which is provided over the light-transmitting semiconductor film, and a first light-transmitting conductive film which is provided over the insulating film are included. The capacitor includes the first light-transmitting conductive film which serves as one electrode, the insulating film which functions as a dielectric, and a second light-transmitting conductive film which faces the first light-transmitting conductive film with the insulating film positioned therebetween and functions as the other electrode.
    Type: Application
    Filed: June 24, 2020
    Publication date: October 8, 2020
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Hideaki SHISHIDO, Jun KOYAMA
  • Publication number: 20200296266
    Abstract: A movable body includes an imaging system which acquires an image formed by a terahertz wave, wherein the image is an image obtained by capturing an inspection object inside the movable body.
    Type: Application
    Filed: March 11, 2020
    Publication date: September 17, 2020
    Inventors: Yasushi Koyama, Takahiro Sato, Takeaki Itsuji, Toshifumi Yoshioka, Eiichi Takami, Noriyuki Kaifu, Jun Iba, Rei Kurashima
  • Publication number: 20200296265
    Abstract: A processing system comprising a first imaging system configured to capture a first image based on a terahertz wave from an inspection target, a second imaging system configured to capture a second image of the inspection target based on an electromagnetic wave of a wavelength different from the terahertz wave, and a processor configured to process the first image and the second image, wherein the processor detects an inspection region based on the second image and processes information of a region of the first image corresponding to the inspection region.
    Type: Application
    Filed: March 11, 2020
    Publication date: September 17, 2020
    Inventors: Takeaki Itsuji, Takahiro Sato, Yasushi Koyama, Toshifumi Yoshioka, Eiichi Takami, Noriyuki Kaifu, Jun Iba, Rei Kurashima
  • Publication number: 20200293806
    Abstract: A camera system is provided. The camera system is arranged to form a part of a monitoring system arranged in a place of a facility where an inspection object lines up. The camera system comprises an imaging system configured to acquire an image formed by a terahertz wave reflected by the inspection object.
    Type: Application
    Filed: March 11, 2020
    Publication date: September 17, 2020
    Inventors: Takahiro Sato, Yasushi Koyama, Takeaki Itsuji, Toshifumi Yoshioka, Eiichi Takami, Rei Kurashima, Jun Iba, Noriyuki Kaifu
  • Patent number: 10777682
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 15, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
  • Publication number: 20200286925
    Abstract: In a display device such as a liquid crystal display device, a large sized display screen is realized under low power consumption. A surface of a source wiring line of a pixel portion employed in an active matrix type liquid crystal display device is processed by way of a plating process operation so as to lower a resistance value of this source wiring line. The source wiring line of the pixel portion is manufactured at a step different from a step for manufacturing a source wiring line of a drive circuit portion. Further, electrodes of a terminal portion are processed by a plating process operation so as to reduce a resistance value thereof.
    Type: Application
    Filed: May 22, 2020
    Publication date: September 10, 2020
    Inventors: Shunpei Yamazaki, Jun Koyama, Hideaki Kuwabara, Saishi Fujikawa
  • Patent number: 10770596
    Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: September 8, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Junpei Sugao, Hideki Uochi, Yasuo Nakamura
  • Patent number: 10770597
    Abstract: A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leadind to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: September 8, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masashi Tsubuku, Kosei Noda
  • Publication number: 20200267985
    Abstract: An isoxazolin-5-one derivative represented by the following (1): wherein R1 represents a C1-C6 haloalkyl group, and R2 to R4 and X each represents a certain substituent or the like; and n represents an integer of 1 to 4, wherein X's may be different from each other when n represents an integer of 2 to 4, and an herbicide containing the isoxazolin-5-one derivative as an active ingredient are provided.
    Type: Application
    Filed: January 19, 2018
    Publication date: August 27, 2020
    Applicant: HOKKO CHEMICAL INDUSTRY CO., LTD.
    Inventors: Jun SUZUKI, Keiyo NAKAI, Kohei KOYAMA, Yutaro TANAKA, Tsunehiro KIDO
  • Publication number: 20200258449
    Abstract: Objects are to provide a display device the power consumption of which is reduced, to provide a self-luminous display device the power consumption of which is reduced and which is capable of long-term use in a dark place. A circuit is formed using a thin film transistor in which a highly-purified oxide semiconductor is used and a pixel can keep a certain state (a state in which a video signal has been written). As a result, even in the case of displaying a still image, stable operation is easily performed. In addition, an operation interval of a driver circuit can be extended, which results in a reduction in power consumption of a display device. Moreover, a light-storing material is used in a pixel portion of a self-luminous display device to store light, whereby the display device can be used in a dark place for a long time.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 13, 2020
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE
  • Patent number: 10742056
    Abstract: The versatility of a power feeding device is improved. A power storage system includes a power storage device and a power feeding device. The power storage device includes data for identifying the power storage device. The power storage device includes a power storage unit, a switch that controls whether power from the power feeding device is supplied to the power storage unit, and a control circuit having a function of controlling a conduction state of the switch in accordance with a control signal input from the power feeding device. The power feeding device includes a signal generation circuit having a function of identifying the power storage device by the data input from the power storage device, generating the control signal corresponding to the identified power storage device, and outputting the generated control signal to the power storage device.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 10720433
    Abstract: The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10?13 A or less.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: July 21, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Keitaro Imai, Jun Koyama
  • Publication number: 20200219905
    Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
    Type: Application
    Filed: March 19, 2020
    Publication date: July 9, 2020
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE
  • Publication number: 20200220362
    Abstract: The versatility of a power feeding device is improved. A power storage system includes a power storage device and a power feeding device. The power storage device includes data for identifying the power storage device. The power storage device includes a power storage unit, a switch that controls whether power from the power feeding device is supplied to the power storage unit, and a control circuit having a function of controlling a conduction state of the switch in accordance with a control signal input from the power feeding device. The power feeding device includes a signal generation circuit having a function of identifying the power storage device by the data input from the power storage device, generating the control signal corresponding to the identified power storage device, and outputting the generated control signal to the power storage device.
    Type: Application
    Filed: March 17, 2020
    Publication date: July 9, 2020
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA
  • Publication number: 20200211246
    Abstract: An electronic device includes a control unit to control so that cyclical scroll display of a same content is performed on the second screen, the cyclical scroll display involving, in accordance with a first operation, scrolling the VR content being displayed by flat display in a first direction without scrolling the indicator and sequentially displaying, in the first direction from an end in a second direction in the rectangular region, an image region corresponding to a scroll amount in the first direction among the VR content, and that the cyclical scroll display is not performed on the first screen even when the first operation is performed; and a generating unit to generate an edited VR content including a second video range that is narrower than the first video range among the VR content on the basis of a region indicated by the indicator.
    Type: Application
    Filed: December 23, 2019
    Publication date: July 2, 2020
    Inventors: Jun Koyama, Koki Kitaya, Shin Murakami
  • Publication number: 20200212078
    Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10?13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.
    Type: Application
    Filed: March 12, 2020
    Publication date: July 2, 2020
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Masashi TSUBUKU, Kosei NODA
  • Patent number: 10700099
    Abstract: A semiconductor device including a capacitor whose charge capacity is increased while improving the aperture ratio is provided. Further, a semiconductor device which consumes less power is provided. A transistor which includes a light-transmitting semiconductor film, a capacitor in which a dielectric film is provided between a pair of electrodes, an insulating film which is provided over the light-transmitting semiconductor film, and a first light-transmitting conductive film which is provided over the insulating film are included. The capacitor includes the first light-transmitting conductive film which serves as one electrode, the insulating film which functions as a dielectric, and a second light-transmitting conductive film which faces the first light-transmitting conductive film with the insulating film positioned therebetween and functions as the other electrode.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: June 30, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroyuki Miyake, Hideaki Shishido, Jun Koyama