Patents by Inventor Jun-kyo Suh

Jun-kyo Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160056209
    Abstract: A 3D semiconductor device and a system having the same are provided. The 3D semiconductor device includes a semiconductor substrate, a common source region formed on the semiconductor substrate and extending in a line shape, an active region formed on the common source region and including a lateral channel region, which is substantially in parallel to a surface of the semiconductor substrate, and source and drain regions that are branched from the lateral channel region to a direction substantially perpendicular to the surface of the semiconductor substrate, and a gate formed in a space between the source region and the drain region.
    Type: Application
    Filed: November 5, 2015
    Publication date: February 25, 2016
    Inventor: Jun Kyo SUH
  • Patent number: 9209226
    Abstract: A 3D semiconductor device and a method of manufacturing the same are provided. The 3D semiconductor device includes a semiconductor substrate, a common source region formed on the semiconductor substrate and extending in a line shape, an active region formed on the common source region and including a lateral channel region, which is substantially in parallel to a surface of the semiconductor substrate, and source and drain regions that are branched from the lateral channel region to a direction substantially perpendicular to the surface of the semiconductor substrate, and a gate formed in a space between the source region and the drain region.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: December 8, 2015
    Assignee: SK Hynix Inc.
    Inventor: Jun Kyo Suh
  • Publication number: 20150325695
    Abstract: A semiconductor apparatus that includes a semiconductor substrate and a plurality of pillars formed in the semiconductor substrate. Each of the plurality of pillars includes a first pillar, and a second pillar formed on the first pillar, wherein the second pillar has a smaller linewidth than the first pillar.
    Type: Application
    Filed: July 11, 2014
    Publication date: November 12, 2015
    Inventors: Jun Kyo SUH, Kang Sik CHOI
  • Patent number: 9076866
    Abstract: A semiconductor device includes a semiconductor substrate including a plurality of pillars, a gate electrode formed to surround a lower portion of the pillar and having a top surface lower than a top surface of the pillar, a salicide layer formed to cover the top surface of the pillar and surround an upper portion of the pillar, and an electrode formed to cover a top surface and a lateral surface of the salicide layer.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: July 7, 2015
    Assignee: SK Hynix Inc.
    Inventor: Jun Kyo Suh
  • Publication number: 20150091081
    Abstract: A semiconductor device includes a semiconductor substrate including a plurality of pillars, a gate electrode formed to surround a lower portion of the pillar and having a top surface lower than a top surface of the pillar, a salicide layer formed to cover the top surface of the pillar and surround an upper portion of the pillar, and an electrode formed to cover a top surface and a lateral surface of the salicide layer.
    Type: Application
    Filed: January 15, 2014
    Publication date: April 2, 2015
    Applicant: SK hynix Inc.
    Inventor: Jun Kyo SUH
  • Publication number: 20150060752
    Abstract: A 3D semiconductor device and a method of manufacturing the same are provided. The 3D semiconductor device includes a semiconductor substrate, a common source region formed on the semiconductor substrate and extending in a line shape, an active region formed on the common source region and including a lateral channel region, which is substantially in parallel to a surface of the semiconductor substrate, and source and drain regions that are branched from the lateral channel region to a direction substantially perpendicular to the surface of the semiconductor substrate, and a gate formed in a space between the source region and the drain region.
    Type: Application
    Filed: January 8, 2014
    Publication date: March 5, 2015
    Applicant: SK hynix Inc.
    Inventor: Jun Kyo SUH
  • Publication number: 20140252299
    Abstract: A semiconductor device includes a plurality of first conductive lines extending in a first direction; a plurality of second conductive lines extending in a second direction crossing the first direction; and a plurality of resistance variable lines interposed between the first and the second conductive lines and extending in a third direction crossing the first and the second directions.
    Type: Application
    Filed: June 21, 2013
    Publication date: September 11, 2014
    Inventors: Hye-Jung CHOI, Jun-Kyo SUH
  • Publication number: 20140138606
    Abstract: Embodiments relate to a resistance variable memory device and a method for forming the same. The resistance variable memory device may include a first electrode, a second electrode spaced apart from the first electrode, a first resistance variable pattern provided over the first electrode and surrounding a lower portion of the second electrode, and a spacer surrounding a sidewall of the first resistance variable pattern. According to embodiments, the resistance variable pattern can be prevented from being damaged in an etching process and an air gap surrounding a portion of the electrode may contribute to improve reliability and an operational speed of the resistance variable memory device.
    Type: Application
    Filed: March 18, 2013
    Publication date: May 22, 2014
    Applicant: SK HYNIX INC.
    Inventor: Jun-Kyo SUH
  • Patent number: 8666499
    Abstract: Disclosed are a system and a method for artificial nerve networking capable of restoring a damaged nerve and allowing selective detection, analysis, transmission and stimulation of a signal from the damaged nerve. The artificial nerve networking system according to an embodiment of the present disclosure includes: a first nerve conduit connected at one end of a damaged nerve; a second nerve conduit connected at the other end of the damaged nerve; and an artificial nerve networking unit electrically connected to the first nerve conduit and the second nerve conduit and recovering the function of the damaged nerve by transmitting and receiving a signal to and from the damaged nerve.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: March 4, 2014
    Assignee: Korean Institute of Science and Technology
    Inventors: In Chan Youn, Kui Won Choi, Jun Kyo Suh, Ji Yoon Kang, Jin Seok Kim, Jun Uk Chu, Ick Chan Kwon, Kwang Meyung Kim
  • Patent number: 6585666
    Abstract: A mechanical diagnostic probe is used to determine the thickness of articular cartilage, so that any degeneration in the articular cartilage can be detected at an early stage. The probe advantageously allows for calibrating the speed of the ultrasound in situ thereby allowing for more accurate measurements of the tissue thickness. The probe also can be used to monitor the condition of the cartilage after surgery and/or after or during physical rehabilitation of the cartilage. The probe is comprised of a probe handle and a probe, which is comprised of an ultrasonic transducer, strain-gauges, and a linear displacement actuator. A predetermined displacement then is applied to the indenter tip and a computer program is then used to analyze the results.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: July 1, 2003
    Assignee: The Administrators of the Tulane Educational Fund
    Inventors: Jun-kyo Suh, Freddie H. Fu, Inchan Youn
  • Publication number: 20020049382
    Abstract: A mechanical diagnostic probe is used to determine the thickness of articular cartilage, so that any degeneration in the articular cartilage can be detected at an early stage. The probe advantageously allows for calibrating the speed of the ultrasound in situ thereby allowing for more accurate measurements of the tissue thickness. The probe also can be used to monitor the condition of the cartilage after surgery and/or after or during physical rehabilitation of the cartilage. The probe is comprised of a probe handle and a probe, which is comprised of an ultrasonic transducer, strain-gauges, and a linear displacement actuator. A predetermined displacement then is applied to the indenter tip and a computer program is then used to analyze the results.
    Type: Application
    Filed: July 30, 2001
    Publication date: April 25, 2002
    Inventors: Jun-Kyo Suh, Freddie H. Fu, Inchan Youn