Patents by Inventor Jun Kyung Na

Jun Kyung Na has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130136321
    Abstract: There is provided a fingerprint detection sensor and a method of detecting a fingerprint. The fingerprint detection sensor according to embodiments of the present invention includes a plurality of piezoelectric sensors arranged on a two-dimensional plane; and a fingerprint detection unit detecting a fingerprint by using ultrasonic signals discharged from the plurality of respective piezoelectric sensors, wherein the fingerprint detection unit determines whether the fingerprint is a forged fingerprint by detecting bloodstreams within a first region on the two-dimensional plane in which the ultrasonic signals discharged from the plurality of respective piezoelectric sensors overlap one another.
    Type: Application
    Filed: April 5, 2012
    Publication date: May 30, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Seoup LEE, Il Kwon Chung, Jae Hyouck Choi, Jun Kyung Na
  • Publication number: 20130129163
    Abstract: There are a fingerprint sensor and a method of operating the same. The fingerprint sensor includes: a fingerprint sensing unit sensing a fingerprint coming into contact with one surface of a substrate; a light source provided at a first end of the substrate; and a light detection unit provided at a second end of the substrate and detecting light emitted from the light source, wherein the first and second ends correspond to both ends of the one surface of the substrate with which the fingerprint comes into contact, respectively, and bio-information of an object coming into contact with the one surface of the substrate is determined by using light detected by the light detection unit.
    Type: Application
    Filed: January 26, 2012
    Publication date: May 23, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Il Kwon CHUNG, Seung Seoup LEE, Jae Hyouck CHOI, Jun Kyung NA
  • Publication number: 20130093512
    Abstract: There are provided a power amplifier and an operation controlling circuit thereof. The power amplifier includes: a signal generating unit generating a current input signal; an amplifying unit amplifying the current input signal; and a driving circuit unit supplying a driving signal to the amplifying unit, wherein the signal generating unit includes a control circuit unit generating a predetermined voltage signal from input power and a current mirror circuit unit generating the current input signal from the voltage signal.
    Type: Application
    Filed: December 21, 2011
    Publication date: April 18, 2013
    Inventors: Shinichi IIZUKA, Jun Kyung Na, Sang Hoon Ha, Youn Suk Kim
  • Publication number: 20130076448
    Abstract: There is provided a power amplifier. The power amplifier includes an amplification unit including at least one amplification device; a power generation unit generating an input signal supplied to the amplification unit; and a bias circuit unit controlling bias of the at least one amplification device according to the input signal, wherein the bias circuit unit supplies a predetermined bias voltage to the amplification unit before the input signal is applied to the amplification unit. According to the embodiments of the present invention, a delay phenomenon occurring at an initial driving time or a low power mode may be significantly reduced by supplying a predetermined bias signal to an amplification unit in a standby circuit before the bias circuit unit of the power amplifier normally outputs the bias signal to the amplification unit.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 28, 2013
    Inventor: Jun Kyung NA
  • Publication number: 20130076445
    Abstract: There is provided a power amplifying apparatus with dual-current control mode, including: a transistor mirror circuit adjusting currents respectively flowing through a main path and a mirror path connected in parallel to a power source terminal; a resistor mirror circuit adjusting the respective currents of the main path and the mirror path; a current controlling unit controlling a control current flowing through the main path with a pre-set constant current; a voltage adjusting unit providing a bias adjustment signal that corresponds to a difference voltage between a first voltage of a first node on the main path to which a current is output from the resistor mirror circuit and a second voltage of a second node on the mirror path to which a current is output from the resistor mirror circuit; and a bias circuit unit adjusting a bias of a power amplifying unit.
    Type: Application
    Filed: December 13, 2011
    Publication date: March 28, 2013
    Inventors: Youn Suk KIM, Jun Kyung NA, Sang Hoon HA, Shinichi IIZUKA
  • Publication number: 20130049872
    Abstract: Disclosed herein is a power amplifier system including: a power amplifier; a power controlling unit providing driving voltage and driving current corresponding to a preset reference voltage to the power amplifier; a current controlling unit performing a control so that control current corresponding to applied control voltage flows; a bias controlling unit detecting current and voltage corresponding to the driving current of the power controlling unit and controlling bias current of the power amplifier according to the detected voltage; and a current adjusting unit detecting bias voltage corresponding to the bias current of the power amplifier and adjusting the driving current of the power controlling unit according to the detected bias voltage. Even though applied control voltage increases, current applied to the power amplifier is appropriately adjusted, thereby making it possible to improve characteristics of the power amplifier.
    Type: Application
    Filed: August 27, 2012
    Publication date: February 28, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: IIZUKA SHINICHI, SANG HOON HA, JUN KYUNG NA
  • Publication number: 20130049870
    Abstract: Disclosed herein is a power amplifier system, including: a power amplifier; a first regulator generating driving voltage Vd and driving current Id corresponding to preset first reference voltage; a current controller controlling the driving current Id of the first regulator corresponding to applied control voltage; a first resistor connected between the first regulator and the current controller and a second resistor connected between the first regulator and the power amplifier, a bias controller detecting current and voltage corresponding to the driving current and controlling bias current of the power amplifier according to the detected voltage; and a second regulator generating power supply voltage corresponding to preset second reference voltage, whereby characteristics of the power amplifier can be improved by constantly controlling current supplied to the power amplifier even though the input voltage applied to the power amplifier system is increased.
    Type: Application
    Filed: August 8, 2012
    Publication date: February 28, 2013
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Kyung NA, Sang Hoon Ha, Shinichi Iizuka, Youn Suk Kim
  • Patent number: 8269560
    Abstract: There is provided a power amplifying apparatus including: a power amplifier; a power regulator providing a driving voltage and a driving current corresponding to a control voltage to the power amplifier; a current sensing unit sensing a current and a voltage corresponding to the driving current and controlling the driving voltage according to the sensed current; a current control unit controlling a current bias according to the sensed voltage of the current sensing unit; and a current bias circuit unit controlling a bias current of the power amplifier according to the controlling of the current control unit.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: September 18, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Kyung Na, Youn Suk Kim, Sang Hoon Ha, Shinichi Iizuka, Sang Wook Park
  • Patent number: 8232828
    Abstract: There is provided an analog circuit having improved response time. An analog circuit having improved response time may include: a low level limiter converting a signal having a lower level than a predetermined reference level into a signal having a predetermined non-low level higher than the predetermined reference level; and an analog circuit section amplifying the signal from the low level limiter into a signal having a predetermined level.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: July 31, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Shinichi Iizuka, Sang Hee Kim, Jun Kyung Na, Sang Hoon Ha
  • Publication number: 20120154052
    Abstract: There is provided a power amplifying apparatus including: a power amplifier; a power regulator providing a driving voltage and a driving current corresponding to a control voltage to the power amplifier; a current sensing unit sensing a current and a voltage corresponding to the driving current and controlling the driving voltage according to the sensed current; a current control unit controlling a current bias according to the sensed voltage of the current sensing unit; and a current bias circuit unit controlling a bias current of the power amplifier according to the controlling of the current control unit.
    Type: Application
    Filed: April 26, 2011
    Publication date: June 21, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jun Kyung NA, Youn Suk KIM, Sang Hoon HA, Shinichi IIZUKA, Sang Wook Park
  • Publication number: 20120139607
    Abstract: Provided is a voltage level shifter changing an input voltage level and outputting the input voltage. There is provided the voltage level shifter, including: an operational amplifier having a first input having an applied input voltage thereto; a first MOSFET having a gate connected to an output of the operational amplifier, a source having an applied power thereto, and a drain outputting an output voltage; a voltage dividing resistor unit including a plurality of voltage dividing resistors sequentially connected to the drain of the first MOSFET in series, one connection node between the plurality of voltage dividing resistors being connected to the second input of the operational amplifier; and a second MOSFET having a source and a drain, respectively connected to both ends of at least one of the voltage dividing resistors, and a gate connected to the gate of the first MOSFET.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 7, 2012
    Inventors: Shinichi Ilzuka, Jun Kyung Na, Sang Hoon Ha, Youn Suk Kim
  • Patent number: 8148961
    Abstract: A low-dropout regulator includes: a first operational amplifier having a first input receiving an input voltage; a first P-channel MOSFET having a gate connected to an output of the first operational amplifier, a source connected to a power source terminal, and a drain connected to an output terminal; a feedback circuit providing at least portion of a voltage of the output terminal as a feedback to a second input of the first operational amplifier; and a triode limiter circuit receiving voltages at the source and the gate of the first P-channel MOSFET comparing a voltage difference therebetween with a predetermined reference voltage, and increasing a voltage of the second input of the first operational amplifier when the voltage difference is the same as the reference voltage.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: April 3, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sang Hoon Ha, Sang Hee Kim, Jun Kyung Na, Shinichi Iizuka
  • Publication number: 20120049925
    Abstract: A level shifter includes: a first buffer amplifier transferring a preset reference voltage to a first output terminal; a second buffer amplifier connected in parallel to the first buffer amplifier and transferring an input voltage to a second output terminal; a positive feedback amplifier connected in parallel to the first buffer amplifier and the second buffer amplifier, and amplifying the input voltage by a preset gain to transfer the amplified input voltage to a third output terminal; and a level regulation unit regulating levels of output signals of the first buffer amplifier, the second buffer amplifier, and the positive feedback amplifier and providing the regulated output signals to a common output node.
    Type: Application
    Filed: August 18, 2011
    Publication date: March 1, 2012
    Inventors: Sang Hoon Ha, Shinichi Iizuka, Youn Suk Kim, Jun Kyung Na
  • Publication number: 20110193545
    Abstract: There is provided a power control system. A power control system may include: a power regulator having a plurality of power PMOS transistors connected to a power source in parallel with each other; a current sensing unit connected to the power source and sensing currents flowing through a plurality of target PMOS transistors located at predetermined positions; a current mirror unit connected to a first regulated voltage terminal and generating a plurality of currents equal to the currents sensed by the current sensing unit; a comparator unit totaling the plurality of currents generated by the current mirror unit to convert the totaled currents into a voltage, and generating a voltage difference between the voltage and a predetermined reference voltage; and a current bias circuit unit controlling a bias current according to the voltage difference from the comparator unit. There is provided a power amplification system including the power control system.
    Type: Application
    Filed: November 5, 2010
    Publication date: August 11, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Hoon HA, Shinichi IIZUKA, Youn Suk KIM, Chul Hwan YOON, Jun Kyung NA
  • Publication number: 20110156677
    Abstract: There is provided a low-dropout regulator capable of preventing transistors from operating in a triode or deep triode region.
    Type: Application
    Filed: August 20, 2010
    Publication date: June 30, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Hoon Ha, Sang Hee Kim, Jun Kyung Na, Shinichi Iizuka
  • Publication number: 20110156203
    Abstract: There is provided an integrated passive device assembly. An integrated passive device assembly according to an aspect of the invention may include: a board having a wiring pattern provided thereon; an integrated passive device mounted on an upper surface of the board and having conductive patterns provided on upper and lower surfaces thereof; a first connection portion electrically connecting the conductive pattern, provided on the upper surface of the integrated passive device, and the wiring pattern to each other; and a second connection portion electrically connecting the conductive pattern, provided on the lower surface of the integrated passive device, and the wiring pattern to each other.
    Type: Application
    Filed: June 25, 2010
    Publication date: June 30, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Wook PARK, Chul Hwan YOON, Youn Suk KIM, Seong Geun KIM, Sang Hee KIM, Jae Hyouck CHOI, Jun Kyung NA
  • Publication number: 20110140756
    Abstract: There is provided an analog circuit having improved response time. An analog circuit having improved response time may include: a low level limiter converting a signal having a lower level than a predetermined reference level into a signal having a predetermined non-low level higher than the predetermined reference level; and an analog circuit section amplifying the signal from the low level limiter into a signal having a predetermined level.
    Type: Application
    Filed: July 13, 2010
    Publication date: June 16, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shinichi IIZUKA, Sang Hee KIM, Jun Kyung NA, Sang Hoon HA
  • Publication number: 20110140682
    Abstract: There is provided a voltage regulator suitable for a CMOS circuit. A voltage regulator suitable for a CMOS circuit according to an aspect of the invention may include: a voltage setting unit setting a voltage across both terminals of a load; a voltage amplification unit setting an input voltage; and a voltage control unit controlling a voltage to be applied to the second connection node according to an output voltage of the voltage amplification unit, wherein the voltage across both terminals of the load is maintained to be constant regardless of variations in a power voltage.
    Type: Application
    Filed: June 29, 2010
    Publication date: June 16, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shinichi IIZUKA, Youn Suk KIM, Joong Jin NAM, Jun Kyung NA, Sang Hoon HA