Patents by Inventor Jun-Lin Tsaz

Jun-Lin Tsaz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6291304
    Abstract: A new design for a high voltage bipolar transistor is disclosed. Instead of a buried subcollector (which would be N+ in an NPN device)d a buried P+ layer is used. The presence of this P+ layer results in pinch-off between itself and the bipolar base. This allows much higher breakdown voltages to be achieved. In particular, the device will not break down at the bottom of the base-collector junction which is the weak spot for conventional devices. A process for manufacturing this device is described. A particular feature of this new process is that the N type epitaxial layer that is grown over the P+ layer is only about half the thickness of its counterpart in the conventional device. The process is fully compatible with conventional BiCMOS processes and has lower cost.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: September 18, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Jun-Lin Tsaz, Ruey-Hsin Liu, Jyh-Min Jiang, Jei-Feng Hwang