Abstract: The present disclosure provides a camera module and a digital device including the camera module. The camera module includes a movable assembly and a fixing assembly. The movable assembly includes a carrier and a first rolling member arranged on a side wall of the carrier, and the first rolling member has a protruding surface protruding from the side wall of the carrier. The fixing assembly includes a base. The base is provided with a first support member, and the first support member is provided with a metal guide rail extending along a direction of an optical axis. When the carrier is installed on the base, the protruding surface of the first rolling member comes into contact with the metal guide rail, and when the movable assembly moves, the first rolling member moves with the movable assembly and forms a rolling or sliding contact with the first support member.

Abstract: A method for manufacturing a nanostructure and a nanostructure are disclosed. The method for manufacturing the nanostructure includes first alternately and periodically stacking a first material layer and a second material layer on a substrate to form a stacked layer, then forming a slot pattern on an upper surface of the stacked layer and etching the stacked layer to an upper surface of the substrate to transfer the slot pattern to the stacked layer, filling the slot pattern in the stacked layer with a molding material, and removing the first material layer or the second material layer left in the stacked layer, so as to form nanopores arranged in an array in the stacked layer.

Abstract: A method for manufacturing a semiconductor and a semiconductor. The method includes: providing a substrate, wherein an active region trench is on the substrate, and a channel stack of a gate-all-around transistor is formed in the active region trench, the active region trench is divided into a source trench and a drain trench by the channel stack; epitaxially growing a source crystal structure in the source trench and a drain crystal structure in the drain trench, and stopping epitaxial growth before crystal planes with different orientations of the source crystal structure intersect and crystal planes with different orientations of the drain crystal structure intersect; and filling gaps between the crystal planes with different orientations of the source crystal structure and the drain crystal structure by using an isotropic metal material, and forming a source and a drain of the gate-all-around transistor in the source trench and the drain trench, respectively.

Abstract: A vehicle driving device includes an electric motor assembly. The electric motor assembly includes: a first electric motor, a second electric motor, and an electric motor controller. An electric motor shaft of the first electric motor and an electric motor shaft of the second electric motor extend in a length direction of a vehicle, and the first electric motor is disposed in front of the second electric motor. The electric motor controller is disposed at a top of the first electric motor and a top of the second electric motor, the first electric motor and the second electric motor are electrically connected to the electric motor controller.

Abstract: The present disclosure discloses a method for manufacturing an oxide layer and a semiconductor device, which pertain to the field of semiconductor technology. The method for manufacturing the oxide layer includes: providing a semiconductor structure; forming a first oxide layer on the semiconductor structure in a first low-temperature environment; applying an oxygen plasma treatment on the first oxide layer and a part of the semiconductor structure in a second low-temperature environment, so that the first oxide layer is formed into a second oxide layer, where a compactness of the second oxide layer is greater than a compactness of the first oxide layer. The semiconductor device includes a semiconductor structure and a second oxide layer disposed on the semiconductor structure, where the second oxide layer is manufactured and formed using the aforementioned oxide layer fabrication method.

Abstract: A semiconductor device includes: a substrate; transistors on the substrate, a channel region being between adjacent transistors, the transistor including a surrounding gate layer, a source layer, a drain layer, and a body contact layer, a body contact cavity being between the source layer and the drain layer, and the body contact layer being in the body contact cavity; a bit line at a bottom of the channel region and coupled to the transistor; a word line on a dielectric layer of the channel region and perpendicular to the bit line, wherein the dielectric layer covers the substrate and the bit line; and a base line in the body contact cavity and the channel region, wherein the base line is in contact with the body contact layer and isolated from the source layer, the drain layer, and the word line, and the base line is parallel to the bit line.

Abstract: The present invention discloses an in-situ detection method for reactive oxygen species, which includes the following steps: attaching a reactive oxygen species composite membrane prepared based on a ratiometric fluorescent probe to a to-be-detected region to react with reactive oxygen species; capturing a green light signal on the reactive oxygen species composite membrane using a digital camera equipped with a 520-540 nm narrow-band filter to obtain an image A; capturing a red light signal on the reactive oxygen species composite membrane using a digital camera equipped with a 640-660 nm filter to obtain an image B; acquiring a numerical value (G) of a green light channel in the image A and a numerical value (R) of a red light channel in the image B respectively, and calculating relative fluorescence intensity (FI) as a reactive oxygen species response value; and obtaining a concentration of the reactive oxygen species in situ.

Abstract: A conformal boron doping method for a three-dimensional structure includes the steps of: removing a natural oxide layer on a surface of a silicon-based three-dimensional substrate; forming a buffer layer on the surface of the silicon-based three-dimensional substrate; forming a boron oxide thin film on the alumina buffer layer; covering a passivation layer on a surface of the boron oxide thin film; and driving boron impurities containing boron oxide into the silicon-based three-dimensional substrate through the buffer layer by using laser or rapid annealing, to dope the silicon-based three-dimensional substrate. Selecting suitable boron source precursors and oxidants solves the problems of difficult nucleation and inability to form a film after reaching a certain thickness for boron oxide. By selecting alumina as the passivation layer, it is possible to protect the boron oxide thin film from being damaged, and thus achieve damage-free diffusion doping during laser or rapid annealing processes.

Abstract: This application discloses an optical signal control method and apparatus, and belongs to the optical communication field. The apparatus includes: a light source, configured to output a first optical signal; an optical switch module, configured to receive the first optical signal and an external second optical signal, and output a third optical signal; and a detection module, configured to detect whether a power change of the second optical signal on at least one wavelength channel is greater than a preset power change threshold, if so, the optical switch module adjusts on/off states of at least one wavelength channel of the received first optical signal and the at least one wavelength channel of the received second optical signal, so that an adjusted first optical signal and an adjusted second optical signal are combined to obtain the third optical signal.

Abstract: The semiconductor device includes a base substrate, first and second layer semiconductor structures, first and second contact structures. The second layer semiconductor structure is arranged above the first layer semiconductor structure at intervals along a thickness direction of the base substrate. The first contact structure is arranged in the base substrate and includes a first contact portion in electrical contact with a first source/drain region included in the transistor in the first layer semiconductor structure and a second contact portion in electrical contact with a first gate stack structure. The second contact structure is arranged on a side of the second layer semiconductor structure away from the first layer semiconductor structure and includes a third contact portion in electrical contact with a second source/drain region included in the transistor in the second layer semiconductor structure and a fourth contact portion in electrical contact with a second gate stack structure.

Abstract: The method of manufacturing a semiconductor device includes forming a fin on a semiconductor substrate, where in the thickness direction of the semiconductor substrate, the fin includes first sacrificial layers and channel layers alternately stacked and second sacrificial layers and a third sacrificial layer alternately stacked; forming a mask straddling the fin; selectively removing the second sacrificial layers to form a first dielectric filling region; forming first middle dielectric isolation layers in the first dielectric filling region; removing the first sacrificial layers, the channel layers, the first middle dielectric isolation layers, and the third sacrificial layer not covered by the mask; forming a first source region and a first drain region on both sides of the remaining first sacrificial layers and channel layer located below the remaining first middle dielectric isolation layers, respectively; and forming an insulating layer on the first source region and the first drain region.

Abstract: The method of manufacturing a semiconductor device includes: forming a fin including first sacrificial layers and channel layers alternately stacked, and second and third sacrificial layers alternately stacked; a material of one of the second and third sacrificial layers including silicon or silicon germanium, and a material of the other one including silicon germanium or germanium; a difference in germanium content between the second and third sacrificial layers being less than 15%, and the second sacrificial layer being doped with an etching auxiliary agent; forming a mask straddling the fin; selectively removing the second sacrificial layers under an accelerated etching effect of the etching auxiliary agent to form a first dielectric filling region; forming first middle dielectric isolation layers in the first dielectric filling region; and removing the first sacrificial layers, the channel layers, the first middle dielectric isolation layers, and the third sacrificial layer not covered by the mask.

Abstract: The present invention relates to the field of drilling coring devices. Disclosed are a pressure-preserved coring tool, a use method, and a reservoir analysis method. The pressure-preserved coring tool comprises an outer cylinder (1), a differential assembly (2), a pressure-preserving inner cylinder assembly (4), and a seal assembly (5). The differential assembly is configured to be able to drive the pressure-pre-serving inner cylinder assembly to move upwards relative to the seal assembly, so that the seal assembly seals the inner cylinder assembly for accommodating a rock core (8).

Abstract: Provided is a semiconductor device. The semiconductor device includes: a semiconductor substrate, a first gate-all-around transistor, a second gate-all-around transistor, an insulation layer, and first and second dielectric isolation layers. The insulation layer is arranged between a source/drain region of the first gate-all-around transistor and a source/drain region of the second gate-all-around transistor. The first dielectric isolation layers and the second dielectric isolation layers are alternately stacked between a channel region of the first gate-all-around transistor and a channel region of the second gate-all-around transistor. A gate stack structure of the first gate-all-around transistor and/or a gate stack structure of the second gate-all-around transistor is located at a periphery of alternately stacked first and second dielectric isolation layers.

Abstract: Systems and methods for simultaneously recovering and separate sounds from multiple sources using Impulse Radio Ultra-Wideband (IR-UWB) signals are described. In one embodiment, a device can be configured for generating an audio signal based on audio source ranging using ultrawideband signals. In an embodiment the device includes, a transmitter circuitry, a receiver circuitry, memory and a processor. The processor configured to generate a radio signal. The radio signal including an ultra-wideband Gaussian pulse modulated on a radio-frequency carrier. The processor further configured to transmit the radio signal using the transmitter circuitry, receive one or more backscattered signals at the receiver circuitry, demodulate the one or more backscattered signals to generate one or more baseband signals, and generate a set of data frames based on the one or more baseband signals.

Abstract: The present disclosure relates to methods and systems for spatiotemporal graph modelling of road users in observed frames of an environment in which an autonomous vehicle operates (i.e. a traffic scene), clustering of the road users into categories, and providing the spatiotemporal graph to a trained graphical convolutional neural network (GNN) to predict a future pedestrian action. The future pedestrian action can be: one of the pedestrian will cross a road and the pedestrian will not cross the road. The spatiotemporal graph includes a better understanding of the observed frames (i.e. traffic scene).

Abstract: A press lock includes a lock plate, and a locking member including a lower mounting plate, a pressing cap, and a lock lever. An elastic retention member configured to maintain the lock lever in a balanced position and a guide block with a guide groove are further included, where an end of a hook connected to the pressing cap is received in the guide groove. When the end of the hook is located at a lower locking position of the guide groove, the pressing cap acts on the elastic retention member to allow the lock lever to move downwards to fit with the lock plate, and when the end of the hook is located at an upper locking position of the guide groove, the lower mounting plate acts on the elastic retention member to allow the lock lever to move upwards and disengage from the lock plate.

Abstract: A method and an apparatus for conformal boron doping of a three-dimensional structure. The method comprises: removing an oxide layer from a surface of a silicon-based three-dimensional (3D) substrate; forming, after removing the oxide layer, a first group of stacked films on a surface of the silicon-based three-dimensional substrate; forming a second group of stacked films on a surface of the first group of stacked films away from the silicon-based 3D substrate; depositing an aluminum oxide passivation layer on a surface of the second group of stacked films away from the first group of stacked films; and boron-doping the silicon-based 3D substrate through laser annealing or rapid thermal annealing, where the laser annealing or the rapid thermal annealing drives boron dopants, which comprises boron oxide, into the silicon-based 3D substrate via an auxiliary layer.

Abstract: A method for preparing a metallic cobalt thin film and a method for preparing a cobalt silicide thin film. A silicon-based three-dimensional substrate is preprocessed to obtain a preprocessed substrate. A cobalt buffer layer is forming in a first reaction chamber on the preprocessed substrate through first atom layer deposition (ALD), where a first gas serves as a carrier gas of the first ALD, and pulses of a first cobalt-based precursor gas and pulses of a first reaction gas are alternately introduced into the first reaction chamber. The metallic cobalt thin film is formed in a second reaction chamber on the cobalt buffer layer through second ALD, where a second gas serves as a carrier gas of the second ALD, and a second cobalt-based precursor gas and a second reaction gas are alternately introduced into the second reaction chamber in pulses.

Abstract: A communication device and an optical communication network are provided. The communication device includes a first wavelength adding/dropping unit and a first wavelength selective switch WSS. The first wavelength adding/dropping unit is connected to a first common port of the first WSS, and a wavelength adding resource pool signal from the first wavelength adding/dropping unit is input to the first WSS through the first common port. The first WSS includes a plurality of branch ports, and the first WSS is configured to schedule different add wavelength signals in the wavelength adding resource pool signal to corresponding branch ports based on a configuration. The plurality of branch ports are in one-to-one correspondence with a plurality of central office CO site rings, and are configured to transmit corresponding add wavelength signals to the corresponding CO rings.