Patents by Inventor Jun Monma

Jun Monma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5969413
    Abstract: A semiconductor chip is supported on a tape carrier provided with lead wirings. The semiconductor chip is electrically connected to the lead wirings. The semiconductor chip of this quality is bonded in combination with the pe carrier to an aluminum nitride substrate. The lead wirings provided on the carrier combine the two functions as an internal lead and an external lead. The semiconductor package of such a structure as is described above allows multi-terminal connection by the narrowing of pitches between the leads and permits provision of a miniature package excelling in the heat-radiating property. Alternatively, the lead wirings supported on the tape carrier and electrically connected to the semiconductor chip are utilized as internal leads. For the external leads, such lead frames as are bonded to the aluminum nitride substrate are used. The lead frames are electrically connected to the internal leads provided in the tape carrier.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: October 19, 1999
    Assignee: Kabushiki Kaishi Toshiba
    Inventors: Keiichi Yano, Kazuo Kimura, Hironori Asai, Jun Monma, Koji Yamakawa, Mitsuyoshi Endo, Hirohisa Osoguchi
  • Patent number: 5928769
    Abstract: This invention provides an aluminum nitride wiring substrate in which a wiring metal layer for forming a signal wiring layer is densified to micropattern a signal wiring portion of an aluminum nitride package incorporating a semiconductor element therein and to increase the signal processing speed of the semiconductor element itself, the electric resistance of the wiring metal layer is reduced while keeping high thermal conductivity and insulating characteristics inherent in the aluminum nitride material to make it possible to mount a high-speed and high-output semiconductor element, and the wiring metal layer is prevented from defective wire continuity, odd appearance, or etc, and a method for the production thereof.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Monma, Hironori Asai
  • Patent number: 5804288
    Abstract: A formed aluminum nitride piece is produced by applying a wiring layer-forming metal paste containing such a high melting temperature metal (wiring metal) as tungsten, for example, to an aluminum nitride green sheet and shaping one layer of the aluminum nitride green sheet now bearing the applied metal paste or superposing a plurality of such layers. In this case, a manganese component destined to densify tungsten is incorporated in at least either of the green sheet and the wiring layer-forming metal paste. The manganese component is either manganese as a simple metallic element or such a manganese compound as manganese oxide. Then, the formed aluminum nitride piece is fired to effect simultaneous sintering of an aluminum nitride and tungsten. Owing to the preparatory addition of the manganese component, a complex compound such as a complex oxide containing manganese and tungsten or a complex such as a eutectic alloy of manganese and tungsten is formed in the wiring metal layer.
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: September 8, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Jun Monma
  • Patent number: 5641718
    Abstract: Disclosed is a sintered aluminum nitride composition and a circuit substrate for use in semiconductor device. The sintered aluminum nitride composition comprises: aluminum nitride; a first component given by a compound containing an element which is selected from the group consisting of alkaline earth elements and group IIIa elements of the periodic table; a second component made of either a simple silicon or a silicon-containig compound; and a third component made of either a simple manganese or a manganese-containing compound. The circuit substrate has an insulating layer which is compoesd of the above-described sintered aluminum nitride composition, and an electrically conductive layer containing an electrically conductive material and the same components as those of the insulating layer.
    Type: Grant
    Filed: August 30, 1995
    Date of Patent: June 24, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Horiguchi, Katsuyoshi Oh-Ishi, Mitsuo Kasori, Hiroyasu Sumino, Fumio Ueno, Jun Monma, Kazuo Kimura
  • Patent number: 5616956
    Abstract: Disclosed is a circuit substrate and a semiconductor device to which the circuit substrate is applied. The circuit substrate has an insulating layer and an electrically conductive layer. The insulating layer is composed of a sintered aluminum nitride composition containing: aluminum nitride; a first component given by a compound containing an element which is selected from the group consisting of group IIa elements and group IIIa elements of the periodic table; a second component given by either a simple boron or a boron compound; and a third component give by either a simple manganese or a manganese compound. The electrically conductive layer contains: a conductive component given by a metal or an electrically conductive compound for exhibiting electric conductivity; aluminum nitride; the first component; the second component; and the third component.
    Type: Grant
    Filed: September 7, 1995
    Date of Patent: April 1, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Horiguchi, Jun Monma, Kazuo Kimura, Katsuyoshi Oh-Ishi, Fumio Ueno, Mitsuo Kasori, Hiroyasu Sumino