Patents by Inventor Jun Muramoto

Jun Muramoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5825062
    Abstract: Pulse shaped voltage of 5V is applied to a source region 3 at initial phase of erase by a pull back voltage generator 13 connected to the sources region 3. Then, the pulse shaped voltages of 10V and 12V increased under stepwise bases are applied to source region 3 with progress of erasion. Generation of hot-holes at the initial phase of data erasion can be prevented because difference in voltage between the floating gate electrode 5 and source region 3 is decreased. Value of the pulse shaped voltage thus applied is increased for the difference occurred between the floating gate electrode 5 and source region 3 when erasion is in much progress. Thus, it is possible to pull out the stored electrons from the floating gate electrode 5 until the threshold voltages can be set at predetermined values. So that, degradation of characteristics of a gate oxidation layer caused by hot-holes generated with erasion can be prevented.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: October 20, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Jun Muramoto
  • Patent number: 5633821
    Abstract: A nonvolatile memory with a simple structure where recorded information can be read without destruction. A voltage is impressed between a control gate and a memory gate for writing. A ferroelectric layer is polarized in accordance with the direction of the impressed voltage. A control gate voltage to make channel is small when the ferroelectric layer is polarized with the control gate side being positive. Control gate voltage to make channel is large when the ferroelectric layer is polarized with the control gate side being negative. The reference voltage is impressed on the control gate for reading. A large drain current flows when the ferroelectric layer is polarized with a second polarization and a small drain current flows when the ferroelectric layer is polarized with a first polarization. Record information can be read by detecting the drain current. Polarization status of the ferroelectric is not destroyed in the reading operation.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: May 27, 1997
    Assignee: Rohm Co., Ltd.
    Inventors: Kiyoshi Nishimura, Hideki Hayashi, Jun Muramoto, Takaaki Fuchikami, Hiromi Uenoyama
  • Patent number: 5592409
    Abstract: Nonvolatile memory with a simple structure where recorded information can be read without destruction: Voltage is impressed between control gate CG and memory gate MG at a writing operation. A ferroelectric layer 32 is polarized in accordance with the direction of the impressed voltage. The control gate voltage V.sub.CG to make a channel is low when the ferroelectric layer 32 is polarized with the control gate side being positive (polarized with second status). The control gate voltage V.sub.CG to make a channel is high when the ferroelectric layer 32 is polarized with the control gate side being negative (polarized with the first status). The reference voltage V.sub.ref is impressed to the control gate CG at the reading operation. A high drain current flows when the ferroelectric layer is polarized with the second status and low drain current flows when the ferroelectric layer is polarized with the first status. Recorded information can be read by detecting the drain current.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: January 7, 1997
    Assignee: Rohm Co., Ltd.
    Inventors: Kiyoshi Nishimura, Hideki Hayashi, Jun Muramoto, Takaaki Fuchikami, Hiromi Uenoyama
  • Patent number: 5541871
    Abstract: Nonvolatile memory with simple structure where recorded information can be read without destroy: Voltage is impressed to control gate CG and channel is grounded at writing operation. Ferroelectric layer 32 is polarized in accordance with whether the applied voltage is larger than threshold voltage of the memory device. Control gate voltage V.sub.CC to make channel is little when the ferro-electric layer 32 is polarized with control gate side being positive (polarized with second status). Control gate voltage V.sub.CG to make channel is large when the ferroelectric layer 32 is polarized with control gate side being negative (polarized with first status). The reference voltage V.sub.ref is impressed to the control gate CG at reading operation. Large drain current flows when the ferroelectric layer is polarized with second status and little drain current flows when the ferroelectric layer is polarized with first status. Recorded information can be read by detecting the drain current.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: July 30, 1996
    Assignee: Rohm Co., Ltd.
    Inventors: Kiyoshi Nishimura, Hideki Hayashi, Jun Muramoto, Takaaki Fuchikami, Hiromi Uenoyama
  • Patent number: 5541873
    Abstract: A nonvolatile memory having a simple structure where recorded information can be read nondestructively. A voltage is applied between a control gate and a memory gate for writing. A ferroelectric layer is polarized in accordance with the polarization of the applied voltage. A control gate voltage, necessary to form a channel, is small when the ferroelectric layer is polarized with the control gate side negative (polarized with second polarization). The control gate voltage V.sub.cg necessary to form a channel is large when the ferroelectric layer is polarized with the control gate side positive (polarized with first polarization). The reference voltage is applied to the control gate for reading. A large drain current flows when the ferroelectric layer is polarized with the second polarization and a small drain current flows when the ferroelectric layer is polarized with the first polarization. Recorded information can be read by detecting the drain current.
    Type: Grant
    Filed: June 15, 1995
    Date of Patent: July 30, 1996
    Assignee: Rohm Co., Ltd.
    Inventors: Kiyoshi Nishimura, Hideki Hayashi, Jun Muramoto, Takaaki Fuchikami, Hiromi Uenoyama