Patents by Inventor Jun Naka

Jun Naka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12278647
    Abstract: A D/A converting unit generates a comparative voltage corresponding to a target bit falling within a range from a most significant bit through a least significant bit. A comparator determines a value of the target bit by comparing a differential voltage between an output signal of an input switching unit and a comparative voltage generated by the D/A converting unit with a reference voltage. An integrator integrates a conversion error. In a first conversion operation of converting a first signal, a control unit sets, based on a result obtained by the integrator, the reference voltage for use when the first signal to be provided next time as the output signal by the input switching unit is A/D converted. In a second conversion operation of A/D converting a second signal, the control unit sets the reference voltage at a constant voltage level.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: April 15, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Jun'ichi Naka, Koji Obata
  • Patent number: 11916563
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor processing circuit, and a sensor system capable of improving responsiveness of feedback control. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to sensor before first output part outputs the first digital data.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: February 27, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Jun'Ichi Naka, Koji Obata, Junji Nakatsuka, Hiroki Yoshino, Masaaki Nagai
  • Publication number: 20230344442
    Abstract: A D/A converting unit generates a comparative voltage corresponding to a target bit falling within a range from a most significant bit through a least significant bit. A comparator determines a value of the target bit by comparing a differential voltage between an output signal of an input switching unit and a comparative voltage generated by the D/A converting unit with a reference voltage. An integrator integrates a conversion error. In a first conversion operation of converting a first signal, a control unit sets, based on a result obtained by the integrator, the reference voltage for use when the first signal to be provided next time as the output signal by the input switching unit is A/D converted. In a second conversion operation of A/D converting a second signal, the control unit sets the reference voltage at a constant voltage level.
    Type: Application
    Filed: June 10, 2021
    Publication date: October 26, 2023
    Inventors: Jun'ichi NAKA, Koji OBATA
  • Patent number: 11677411
    Abstract: An A/D converter includes an A/D conversion unit and an output unit. The A/D conversion unit includes a second A/D converter (successive approximation register A/D converter) and generates first digital data having a first number of bits and second digital data having a second number of bits, where the second number of bits is smaller than the first number of bits. The output unit provides first output information that is the first digital data and also provides second output information based on the second digital data. The output unit provides the second output information before providing the first output information.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: June 13, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junji Nakatsuka, Hiroki Yoshino, Jun'ichi Naka, Koji Obata, Masaaki Nagai
  • Patent number: 11664815
    Abstract: A digital filter is used in an A/D converter and includes a first filter and second filter. The first filter outputs first digital data by performing filter processing on output of an A/D conversion unit included in the A/D converter. The second filter outputs second digital data by performing filter processing on the output of the A/D conversion unit. The second digital data has either a lower resolution or a smaller effective number of bits than the first digital data does. The second filter outputs the second digital data before the first filter outputs the first digital data.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: May 30, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaaki Nagai, Hiroki Yoshino, Junji Nakatsuka, Jun'ichi Naka, Koji Obata
  • Patent number: 11611349
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor system, and a test system capable of reducing the time for test processing. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to test controller before first output part outputs the first digital data. In the test mode, test controller determines whether or not sensor system including sensor is in an abnormal state on the basis of the second digital data.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: March 21, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Koji Obata, Jun'ichi Naka, Junji Nakatsuka, Hiroki Yoshino, Masaaki Nagai
  • Patent number: 11518677
    Abstract: Provided is a heterofullerene where n number (where n is a positive even number) of carbon atoms constituting a fullerene are substituted by n number of boron atoms or n number of nitrogen atoms.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: December 6, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Nobuyuki Matsuzawa, Masaru Sasago, Jun'ichi Naka
  • Publication number: 20220173746
    Abstract: An A/D converter includes an A/D conversion unit and an output unit. The A/D conversion unit includes a second A/D converter (successive approximation register A/D converter) and generates first digital data having a first number of bits and second digital data having a second number of bits, where the second number of bits is smaller than the first number of bits. The output unit provides first output information that is the first digital data and also provides second output information based on the second digital data. The output unit provides the second output information before providing the first output information.
    Type: Application
    Filed: February 28, 2020
    Publication date: June 2, 2022
    Inventors: Junji NAKATSUKA, Hiroki YOSHINO, Jun'ichi NAKA, Koji OBATA, Masaaki NAGAI
  • Publication number: 20220158652
    Abstract: A digital filter is used in an A/D converter and includes a first filter and second filter. The first filter outputs first digital data by performing filter processing on output of an A/D conversion unit included in the A/D converter. The second filter outputs second digital data by performing filter processing on the output of the A/D conversion unit. The second digital data has either a lower resolution or a smaller effective number of bits than the first digital data does. The second filter outputs the second digital data before the first filter outputs the first digital data.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 19, 2022
    Inventors: Masaaki NAGAI, Hiroki YOSHINO, Junji NAKATSUKA, Jun'ichi NAKA, Koji OBATA
  • Publication number: 20220123757
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor processing circuit, and a sensor system capable of improving responsiveness of feedback control. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to sensor before first output part outputs the first digital data.
    Type: Application
    Filed: March 9, 2020
    Publication date: April 21, 2022
    Inventors: JUN'ICHI NAKA, KOJI OBATA, JUNJI NAKATSUKA, HIROKI YOSHINO, MASAAKI NAGAI
  • Publication number: 20220123758
    Abstract: Provided are an analog-to-digital (AD) converter, a sensor system, and a test system capable of reducing the time for test processing. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to test controller before first output part outputs the first digital data. In the test mode, test controller determines whether or not sensor system including sensor is in an abnormal state on the basis of the second digital data.
    Type: Application
    Filed: March 13, 2020
    Publication date: April 21, 2022
    Inventors: KOJI OBATA, JUN'ICHI NAKA, JUNJI NAKATSUKA, HIROKI YOSHINO, MASAAKI NAGAI
  • Patent number: 11031558
    Abstract: A p-type semiconductor film including heterofullerene having a further sufficiently high hole mobility is provided. The p-type semiconductor film contains heterofullerene in which n+r number (where n and r are both positive odd numbers) of carbon atoms constituting a fullerene are substituted by n number of boron atom or atoms and r number of nitrogen atom or atoms.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: June 8, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Nobuyuki Matsuzawa, Masaru Sasago, Jun'ichi Naka
  • Publication number: 20200381626
    Abstract: A p-type semiconductor film including heterofullerene having a further sufficiently high hole mobility is provided. The p-type semiconductor film contains heterofullerene in which n+r number (where n and r are both positive odd numbers) of carbon atoms constituting a fullerene are substituted by n number of boron atom or atoms and r number of nitrogen atom or atoms.
    Type: Application
    Filed: August 7, 2018
    Publication date: December 3, 2020
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Nobuyuki MATSUZAWA, Masaru SASAGO, Jun'ichi NAKA
  • Publication number: 20200372317
    Abstract: A wireless communication semiconductor device includes a circuit board, a semiconductor chip mounted on the circuit board, a thin film transistor provided on the circuit board, and an antenna provided on the circuit board. Even if a different unique ID is assigned to each of the wireless communication semiconductor devices, as compared with silicon-based wireless communication semiconductor devices, a manufacturing cost per device is sufficiently reduced, and the reduction in operation speed and reliability is sufficiently prevented.
    Type: Application
    Filed: January 23, 2019
    Publication date: November 26, 2020
    Inventors: KOJI OBATA, HIDEYUKI ARAI, JUN'ICHI NAKA
  • Publication number: 20200342282
    Abstract: Improving safety against peeling-off of a semiconductor device from an article and omitting an adhesion work of the semiconductor device to the article are made possible. Provided is semiconductor device including one or more components selected from a group including semiconductor chip, thin film transistor, antenna, and wiring. The one or more components are directly fixed on a surface of article. Provided is a manufacturing method of semiconductor device including one or more components selected from a group including semiconductor chip, thin film transistor, antenna, and wiring. The manufacturing method includes at least one of following step P1 and step Q1: step P1 of directly mounting the semiconductor chip on a surface of an article; and step Q1 of directly forming one or more components selected from a group including the thin film transistor, the antenna, and the wiring on the surface of the article by a printing method.
    Type: Application
    Filed: February 4, 2019
    Publication date: October 29, 2020
    Inventors: KOJI OBATA, HIDEYUKI ARAI, JUN'ICHI NAKA
  • Publication number: 20200280269
    Abstract: The present disclosure provides a vibration power generation device capable of generating large electric power relative to an amount of displacement of a portion of a specimen. Vibration power generation device according to the present invention includes piezoelectric part and displacement enhancer. In response to displacement of a portion of specimen, displacement enhancer displaces a portion of piezoelectric part by a displacement amount greater than an amount of the displacement of the portion of specimen. When the portion of piezoelectric part is displaced, piezoelectric part generates electric power in accordance with an amount of the displacement of the portion of piezoelectric part.
    Type: Application
    Filed: October 26, 2018
    Publication date: September 3, 2020
    Inventors: HIDEYUKI ARAI, JUN'ICHI NAKA, TOSHIAKI OZEKI, KOJI OBATA
  • Publication number: 20200239313
    Abstract: Provided is a heterofullerene where n number (where n is a positive even number) of carbon atoms constituting a fullerene are substituted by n number of boron atoms or n number of nitrogen atoms.
    Type: Application
    Filed: August 7, 2018
    Publication date: July 30, 2020
    Inventors: NOBUYUKI MATSUZAWA, MASARU SASAGO, JUN'ICHI NAKA
  • Patent number: 10389317
    Abstract: A differential amplifier circuit comprises: first and second input terminals; first and second output terminals; a first transistor comprising a gate terminal connected to the first input terminal; a second transistor comprising a gate terminal connected to the second input terminal; a first resistor connected between the source terminal of the first transistor and the source terminal of the second transistor; a third transistor comprising a drain terminal connected to the source terminal of the first transistor, a gate terminal connected to the drain terminal of the first transistor, and a source terminal connected to the first output terminal; a fourth transistor comprising a drain terminal connected to the source terminal of the second transistor, a gate terminal connected to the drain terminal of the second transistor, and a source terminal connected to the second output terminal; first to fourth current sources; and second and third resistors.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: August 20, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshiaki Ozeki, Jun'ichi Naka
  • Publication number: 20170310292
    Abstract: A differential amplifier circuit comprises: first and second input terminals; first and second output terminals; a first transistor comprising a gate terminal connected to the first input terminal; a second transistor comprising a gate terminal connected to the second input terminal; a first resistor connected between the source terminal of the first transistor and the source terminal of the second transistor; a third transistor comprising a drain terminal connected to the source terminal of the first transistor, a gate terminal connected to the drain terminal of the first transistor, and a source terminal connected to the first output terminal; a fourth transistor comprising a drain terminal connected to the source terminal of the second transistor, a gate terminal connected to the drain terminal of the second transistor, and a source terminal connected to the second output terminal; first to fourth current sources; and second and third resistors.
    Type: Application
    Filed: March 21, 2017
    Publication date: October 26, 2017
    Inventors: TOSHIAKI OZEKI, JUN'ICHI NAKA
  • Patent number: 6933253
    Abstract: An alkali-free glass applicable to a light transparent glass substrate in a liquid crystal display essentially consists, by weight, of basic elements of 40-70% SiO2, 6-25% Al2O3, 5-20% B2O3, 0-10% MgO, 0-15% CaO, 0-30% BaO, 0-10% SrO, and 0-10% ZnO, and a fining agent of a combination of 0.05-3% Sb2O3 and at least one of 0.05-2% SnO2 and 0.005-1% Cl2, which fining agent makes the resultant glass free from bubbles without the use of toxic As2O3 which has been known as the fining agent in the art.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: August 23, 2005
    Assignee: Nippon Electric Glass Co., Ltd.
    Inventors: Jun Naka, Toshiharu Narita, Shinkichi Miwa, Shigeru Yamamoto